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| author | James Hogan <james.hogan@imgtec.com> | 2016-05-06 14:36:19 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 14:02:18 +0200 |
| commit | 9b5c3399584b6f6aa755dbe11e3cef5776fd279d (patch) | |
| tree | 52234bb21d945aaa67b85d56ce247ec0736adca5 /arch/mips/pci | |
| parent | 5fb59fd2e7f7ee6bfc20ab9c0ef82e33c0057be5 (diff) | |
| download | linux-9b5c3399584b6f6aa755dbe11e3cef5776fd279d.tar.gz linux-9b5c3399584b6f6aa755dbe11e3cef5776fd279d.tar.bz2 linux-9b5c3399584b6f6aa755dbe11e3cef5776fd279d.zip | |
MIPS: Add & use CP0_EntryHi ASID definitions
Add definitions for the ASID field in CP0_EntryHi (along with the soon
to be used ASIDX field), and use them in a few previously hardcoded
cases.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13205/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
| -rw-r--r-- | arch/mips/pci/pci-alchemy.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c index 28952637a862..c8994c156e2d 100644 --- a/arch/mips/pci/pci-alchemy.c +++ b/arch/mips/pci/pci-alchemy.c @@ -76,7 +76,7 @@ static void mod_wired_entry(int entry, unsigned long entrylo0, unsigned long old_ctx; /* Save old context and create impossible VPN2 value */ - old_ctx = read_c0_entryhi() & 0xff; + old_ctx = read_c0_entryhi() & MIPS_ENTRYHI_ASID; old_pagemask = read_c0_pagemask(); write_c0_index(entry); write_c0_pagemask(pagemask); |