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| author | John Crispin <blogic@openwrt.org> | 2013-08-08 13:17:48 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-09-04 16:56:09 +0200 |
| commit | 538e0daa0d5142fbd3b744e0be7a01f406efae40 (patch) | |
| tree | ca2b6c8b41a2131edd5c8058f295af9a2850ac64 /arch/mips/ralink | |
| parent | b1f172a133879674ee4ab7146b788ee18aa8485a (diff) | |
| download | linux-538e0daa0d5142fbd3b744e0be7a01f406efae40.tar.gz linux-538e0daa0d5142fbd3b744e0be7a01f406efae40.tar.bz2 linux-538e0daa0d5142fbd3b744e0be7a01f406efae40.zip | |
MIPS: ralink: mt7620: Add verbose ram info
Make the code print which of SDRAM, DDR1 or DDR2 was detected.
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/5671/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ralink')
| -rw-r--r-- | arch/mips/ralink/mt7620.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index 0018b1a661f6..ccdec5a68c18 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -214,16 +214,19 @@ void prom_soc_init(struct ralink_soc_info *soc_info) switch (dram_type) { case SYSCFG0_DRAM_TYPE_SDRAM: + pr_info("Board has SDRAM\n"); soc_info->mem_size_min = MT7620_SDRAM_SIZE_MIN; soc_info->mem_size_max = MT7620_SDRAM_SIZE_MAX; break; case SYSCFG0_DRAM_TYPE_DDR1: + pr_info("Board has DDR1\n"); soc_info->mem_size_min = MT7620_DDR1_SIZE_MIN; soc_info->mem_size_max = MT7620_DDR1_SIZE_MAX; break; case SYSCFG0_DRAM_TYPE_DDR2: + pr_info("Board has DDR2\n"); soc_info->mem_size_min = MT7620_DDR2_SIZE_MIN; soc_info->mem_size_max = MT7620_DDR2_SIZE_MAX; break; |