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| author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:09 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:09 +0100 |
| commit | 91a2fcc88634663e9e13dcdfad0e4a860e64aeee (patch) | |
| tree | a86b936f1057207d46e5a07ed826052ff640869a /arch/mips/sibyte/sb1250 | |
| parent | 90b02340dcc6ce00bf22c48f4865915f5989e5e4 (diff) | |
| download | linux-91a2fcc88634663e9e13dcdfad0e4a860e64aeee.tar.gz linux-91a2fcc88634663e9e13dcdfad0e4a860e64aeee.tar.bz2 linux-91a2fcc88634663e9e13dcdfad0e4a860e64aeee.zip | |
[MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte/sb1250')
| -rw-r--r-- | arch/mips/sibyte/sb1250/time.c | 13 |
1 files changed, 1 insertions, 12 deletions
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c index 2efffe15ff23..5bb83cd4c113 100644 --- a/arch/mips/sibyte/sb1250/time.c +++ b/arch/mips/sibyte/sb1250/time.c @@ -125,18 +125,7 @@ void sb1250_timer_interrupt(void) ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); - if (cpu == 0) { - /* - * CPU 0 handles the global timer interrupt job - */ - ll_timer_interrupt(irq); - } - else { - /* - * other CPUs should just do profiling and process accounting - */ - ll_local_timer_interrupt(irq); - } + ll_timer_interrupt(irq); } /* |