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| author | David Daney <ddaney@caviumnetworks.com> | 2010-05-19 14:16:32 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-05-21 21:31:23 +0100 |
| commit | 606c958e2857d29106b8d3b2fc30e22f376c80c5 (patch) | |
| tree | d5ea9847b33df34228570f36733bf2eadfae45b5 /arch/mips | |
| parent | 1dd5216e80318b4cb25c1785f5d11a6f042f0a3b (diff) | |
| download | linux-606c958e2857d29106b8d3b2fc30e22f376c80c5.tar.gz linux-606c958e2857d29106b8d3b2fc30e22f376c80c5.tar.bz2 linux-606c958e2857d29106b8d3b2fc30e22f376c80c5.zip | |
MIPS: Octeon: Serial port fixes for OCTEON simulator.
For the simulator, fake a slow clock to get fast output.
In prom_putchar we have to mask the value so the simulator doesn't
ASSERT when printing non-ASCII characters.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1255/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/cavium-octeon/serial.c | 6 | ||||
| -rw-r--r-- | arch/mips/cavium-octeon/setup.c | 2 |
2 files changed, 6 insertions, 2 deletions
diff --git a/arch/mips/cavium-octeon/serial.c b/arch/mips/cavium-octeon/serial.c index 8240728d485a..83eac37a1ff9 100644 --- a/arch/mips/cavium-octeon/serial.c +++ b/arch/mips/cavium-octeon/serial.c @@ -65,7 +65,11 @@ static void __init octeon_uart_set_common(struct plat_serial8250_port *p) p->type = PORT_OCTEON; p->iotype = UPIO_MEM; p->regshift = 3; /* I/O addresses are every 8 bytes */ - p->uartclk = mips_hpt_frequency; + if (octeon_is_simulation()) + /* Make simulator output fast*/ + p->uartclk = 115200 * 16; + else + p->uartclk = mips_hpt_frequency; p->serial_in = octeon_serial_in; p->serial_out = octeon_serial_out; } diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 44cb20cd3bdc..d1b5ffaf0281 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c @@ -702,7 +702,7 @@ int prom_putchar(char c) } while ((lsrval & 0x20) == 0); /* Write the byte */ - cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c); + cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c & 0xffull); return 1; } |