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authorPaul Burton <paul.burton@imgtec.com>2014-03-24 10:19:35 +0000
committerRalf Baechle <ralf@linux-mips.org>2014-03-31 18:17:13 +0200
commit9a1724c7506bfa7d3d9dcab13f83e9e6446929f9 (patch)
treeed3ead9dc65f967f2afd0ed9683cfdfbcc407f08 /arch/mips
parentcd217546602dbfe96c3f8e8025eb750fadf1ab4f (diff)
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MIPS: CPC: Use __raw_ memory access functions
The CPC registers use native endianness, so using plain readl & writel will produce incorrect results on big endian systems. Reported-by: Jeffrey Deans <jeffrey.deans@imgtec.com> Reported-by: Keng Koh <keng.koh@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6657/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/mips-cpc.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mips-cpc.h b/arch/mips/include/asm/mips-cpc.h
index fb78935010a3..988507e46d42 100644
--- a/arch/mips/include/asm/mips-cpc.h
+++ b/arch/mips/include/asm/mips-cpc.h
@@ -75,13 +75,13 @@ static inline bool mips_cpc_present(void)
#define BUILD_CPC_R_(name, off) \
static inline u32 read_cpc_##name(void) \
{ \
- return readl(mips_cpc_base + (off)); \
+ return __raw_readl(mips_cpc_base + (off)); \
}
#define BUILD_CPC__W(name, off) \
static inline void write_cpc_##name(u32 value) \
{ \
- writel(value, mips_cpc_base + (off)); \
+ __raw_writel(value, mips_cpc_base + (off)); \
}
#define BUILD_CPC_RW(name, off) \