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| author | David Howells <dhowells@redhat.com> | 2010-10-27 17:28:58 +0100 |
|---|---|---|
| committer | David Howells <dhowells@redhat.com> | 2010-10-27 17:28:58 +0100 |
| commit | 6044cf1d9426dfd5cdc1e7b9cf8eaed6418e1ff6 (patch) | |
| tree | 3f6f209d37328ce1635df8f5d0b5df1cef1afe30 /arch/mn10300/unit-asb2364/include/unit/fpga-regs.h | |
| parent | 730c1fad0ee22a170d2ee76a904709ee304931c0 (diff) | |
| download | linux-6044cf1d9426dfd5cdc1e7b9cf8eaed6418e1ff6.tar.gz linux-6044cf1d9426dfd5cdc1e7b9cf8eaed6418e1ff6.tar.bz2 linux-6044cf1d9426dfd5cdc1e7b9cf8eaed6418e1ff6.zip | |
MN10300: ASB2364: Handle the IRQ multiplexer in the FPGA
Handle the IRQ multiplexer in the FPGA by implementing a cascade interrupt
driver for it.
Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch/mn10300/unit-asb2364/include/unit/fpga-regs.h')
| -rw-r--r-- | arch/mn10300/unit-asb2364/include/unit/fpga-regs.h | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h b/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h index a039a50c91db..7cf12054db65 100644 --- a/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h +++ b/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h @@ -14,17 +14,19 @@ #define ASB2364_FPGA_REG_RESET_USB __SYSREG(0xa900130c, u16) #define ASB2364_FPGA_REG_RESET_AV __SYSREG(0xa9001310, u16) -#define ASB2364_FPGA_REG_IRQ_LAN __SYSREG(0xa9001510, u16) -#define ASB2364_FPGA_REG_IRQ_UART __SYSREG(0xa9001514, u16) -#define ASB2364_FPGA_REG_IRQ_I2C __SYSREG(0xa9001518, u16) -#define ASB2364_FPGA_REG_IRQ_USB __SYSREG(0xa900151c, u16) -#define ASB2364_FPGA_REG_IRQ_FPGA __SYSREG(0xa9001524, u16) - -#define ASB2364_FPGA_REG_MASK_LAN __SYSREG(0xa9001590, u16) -#define ASB2364_FPGA_REG_MASK_UART __SYSREG(0xa9001594, u16) -#define ASB2364_FPGA_REG_MASK_I2C __SYSREG(0xa9001598, u16) -#define ASB2364_FPGA_REG_MASK_USB __SYSREG(0xa900159c, u16) -#define ASB2364_FPGA_REG_MASK_FPGA __SYSREG(0xa90015a4, u16) +#define ASB2364_FPGA_REG_IRQ(X) __SYSREG(0xa9001590+((X)*4), u16) +#define ASB2364_FPGA_REG_IRQ_LAN ASB2364_FPGA_REG_IRQ(0) +#define ASB2364_FPGA_REG_IRQ_UART ASB2364_FPGA_REG_IRQ(1) +#define ASB2364_FPGA_REG_IRQ_I2C ASB2364_FPGA_REG_IRQ(2) +#define ASB2364_FPGA_REG_IRQ_USB ASB2364_FPGA_REG_IRQ(3) +#define ASB2364_FPGA_REG_IRQ_FPGA ASB2364_FPGA_REG_IRQ(5) + +#define ASB2364_FPGA_REG_MASK(X) __SYSREG(0xa9001590+((X)*4), u16) +#define ASB2364_FPGA_REG_MASK_LAN ASB2364_FPGA_REG_MASK(0) +#define ASB2364_FPGA_REG_MASK_UART ASB2364_FPGA_REG_MASK(1) +#define ASB2364_FPGA_REG_MASK_I2C ASB2364_FPGA_REG_MASK(2) +#define ASB2364_FPGA_REG_MASK_USB ASB2364_FPGA_REG_MASK(3) +#define ASB2364_FPGA_REG_MASK_FPGA ASB2364_FPGA_REG_MASK(5) #define ASB2364_FPGA_REG_CPLD5_SET1 __SYSREG(0xa9002500, u16) #define ASB2364_FPGA_REG_CPLD5_SET2 __SYSREG(0xa9002504, u16) |