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authorNicholas Piggin <npiggin@gmail.com>2017-05-01 22:01:09 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2017-05-30 14:59:51 +1000
commitf1fe5252018075e18d7f0c0e23ee173546420361 (patch)
tree7a255b9ea0493470adfd97e4938f28be8a9738f5 /arch/powerpc/include/asm
parent5ed02dbb497422bf225783f46e6eadd237d23d6b (diff)
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powerpc/64s: Fix FIXUP_ENDIAN non-maskable interrupt reentrancy
FIXUP_ENDIAN uses SRR[01] with MSR_RI=1, which gets corrupted if there is an interleaving system reset or machine check interrupt. Set MSR_RI=0 before setting SRRs. The rfid will restore MSR. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h11
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 359c44341761..6baeeb9acd0d 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -770,15 +770,18 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
#else
#define FIXUP_ENDIAN \
tdi 0,0,0x48; /* Reverse endian of b . + 8 */ \
- b $+36; /* Skip trampoline if endian is good */ \
- .long 0x05009f42; /* bcl 20,31,$+4 */ \
- .long 0xa602487d; /* mflr r10 */ \
- .long 0x1c004a39; /* addi r10,r10,28 */ \
+ b $+44; /* Skip trampoline if endian is good */ \
.long 0xa600607d; /* mfmsr r11 */ \
.long 0x01006b69; /* xori r11,r11,1 */ \
+ .long 0x00004039; /* li r10,0 */ \
+ .long 0x6401417d; /* mtmsrd r10,1 */ \
+ .long 0x05009f42; /* bcl 20,31,$+4 */ \
+ .long 0xa602487d; /* mflr r10 */ \
+ .long 0x14004a39; /* addi r10,r10,20 */ \
.long 0xa6035a7d; /* mtsrr0 r10 */ \
.long 0xa6037b7d; /* mtsrr1 r11 */ \
.long 0x2400004c /* rfid */
+
#endif /* !CONFIG_PPC_BOOK3E */
#endif /* __ASSEMBLY__ */