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authorIan Munsie <imunsie@au1.ibm.com>2013-02-07 15:46:58 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-02-08 14:05:50 +1100
commit2468dcf641e4f3e1b0153e3e11ca20740b2f4ce8 (patch)
tree02a1ca877b20fd0975befc2554957ee4b535a6a0 /arch/powerpc/kernel/cpu_setup_power.S
parent14b6f00f8a4fdec5ccd45a0710284de301a61628 (diff)
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powerpc: Add support for context switching the TAR register
This patch adds support for enabling and context switching the Target Address Register in Power8. The TAR is a new special purpose register that can be used for computed branches with the bctar[l] (branch conditional to TAR) instruction in the same manner as the count and link registers. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/cpu_setup_power.S')
-rw-r--r--arch/powerpc/kernel/cpu_setup_power.S7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index 57cf14065aec..d29facbf9a28 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -56,6 +56,7 @@ _GLOBAL(__setup_cpu_power8)
mfspr r3,SPRN_LPCR
oris r3, r3, LPCR_AIL_3@h
bl __init_LPCR
+ bl __init_FSCR
bl __init_TLB
mtlr r11
blr
@@ -112,6 +113,12 @@ __init_LPCR:
isync
blr
+__init_FSCR:
+ mfspr r3,SPRN_FSCR
+ ori r3,r3,FSCR_TAR
+ mtspr SPRN_FSCR,r3
+ blr
+
__init_TLB:
/* Clear the TLB */
li r6,128