diff options
| author | Anton Blanchard <anton@samba.org> | 2007-10-15 05:33:17 +1000 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2007-10-17 22:30:09 +1000 |
| commit | 9697add0f88b439d4f5f25556785beeaf6b836b9 (patch) | |
| tree | 665519f0a204c8577818b09e10b3e0fd87846a03 /arch/powerpc/kernel/setup_64.c | |
| parent | 1281c8bef8e85d3d6b114eab945b7e0445a3886d (diff) | |
| download | linux-9697add0f88b439d4f5f25556785beeaf6b836b9.tar.gz linux-9697add0f88b439d4f5f25556785beeaf6b836b9.tar.bz2 linux-9697add0f88b439d4f5f25556785beeaf6b836b9.zip | |
[POWERPC] Quieten cache information at boot
After 6 years the ppc64 kernel still thinks its important to tell me my
cache line size is 0x80 bytes. I think most people who care know that by
now. The rest probably cant even understand the hex output.
Since we might have misconfigured firmware or cpus that have a linesize
that isnt 128 bytes, I still print it out for those cases. If people
would prefer to remove it completely, lets do it.
Also for lpar remove the htab_address printout since its not used.
Anton
ppc64 boot log usability expert
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/setup_64.c')
| -rw-r--r-- | arch/powerpc/kernel/setup_64.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 0e014550b83f..ede77dbbd4df 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c @@ -426,11 +426,14 @@ void __init setup_system(void) printk("-----------------------------------------------------\n"); printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); - printk("ppc64_caches.dcache_line_size = 0x%x\n", - ppc64_caches.dline_size); - printk("ppc64_caches.icache_line_size = 0x%x\n", - ppc64_caches.iline_size); - printk("htab_address = 0x%p\n", htab_address); + if (ppc64_caches.dline_size != 0x80) + printk("ppc64_caches.dcache_line_size = 0x%x\n", + ppc64_caches.dline_size); + if (ppc64_caches.iline_size != 0x80) + printk("ppc64_caches.icache_line_size = 0x%x\n", + ppc64_caches.iline_size); + if (htab_address) + printk("htab_address = 0x%p\n", htab_address); printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); #if PHYSICAL_START > 0 printk("physical_start = 0x%x\n", PHYSICAL_START); |