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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-02-17 10:00:42 +1100
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-02-17 10:00:42 +1100
commitec144a81ade915b5b38adedf10e84690813ed768 (patch)
treec94b53c971ab2c39e27433267318b3c7bc86ff1b /arch/powerpc/mm
parentb919ee827e048826786fd7e889a2b04f63382fe6 (diff)
parent88626272549b94310975932a9970d11a9b362a16 (diff)
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Merge commit 'origin/master' into next
Diffstat (limited to 'arch/powerpc/mm')
-rw-r--r--arch/powerpc/mm/tlb_hash64.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c
index 282d9306361f..1ec06576f619 100644
--- a/arch/powerpc/mm/tlb_hash64.c
+++ b/arch/powerpc/mm/tlb_hash64.c
@@ -63,15 +63,21 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
if (huge) {
#ifdef CONFIG_HUGETLB_PAGE
psize = get_slice_psize(mm, addr);
+ /* Mask the address for the correct page size */
+ addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1);
#else
BUG();
psize = pte_pagesize_index(mm, addr, pte); /* shutup gcc */
#endif
- } else
+ } else {
psize = pte_pagesize_index(mm, addr, pte);
+ /* Mask the address for the standard page size. If we
+ * have a 64k page kernel, but the hardware does not
+ * support 64k pages, this might be different from the
+ * hardware page size encoded in the slice table. */
+ addr &= PAGE_MASK;
+ }
- /* Mask the address for the correct page size */
- addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1);
/* Build full vaddr */
if (!is_kernel_addr(addr)) {