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| author | Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> | 2020-05-05 12:47:13 +0530 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-05-05 21:20:14 +1000 |
| commit | 0da81b658b5bf5c16abe51eb32f1905a32322f53 (patch) | |
| tree | 3ee126bd3f0a01d50de0918909278a74f902f5c6 /arch/powerpc/perf | |
| parent | 2f92447f9f96583112420aa3cfb400ded55f667e (diff) | |
| download | linux-0da81b658b5bf5c16abe51eb32f1905a32322f53.tar.gz linux-0da81b658b5bf5c16abe51eb32f1905a32322f53.tar.bz2 linux-0da81b658b5bf5c16abe51eb32f1905a32322f53.zip | |
powerpc/mce: Don't reload pte val in addr_to_pfn
A lockless page table walk should be safe against parallel THP collapse, THP
split and madvise(MADV_DONTNEED)/parallel fault. This patch makes sure kernel
won't reload the pteval when checking for different conditions. The patch also added
a check for pte_present to make sure the kernel is indeed operating
on a PTE and not a pointer to level 0 table page.
The pfn value we find here can be different from the actual pfn on which
machine check happened. This can happen if we raced with a parallel update
of the page table. In such a scenario we end up isolating a wrong pfn. But that
doesn't have any other side effect.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200505071729.54912-7-aneesh.kumar@linux.ibm.com
Diffstat (limited to 'arch/powerpc/perf')
0 files changed, 0 insertions, 0 deletions