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| author | Frederic Barrat <fbarrat@linux.vnet.ibm.com> | 2018-01-23 12:31:36 +0100 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-01-24 11:42:56 +1100 |
| commit | 7f2c39e91f61fcd2abed3b39c14e7037c060c6f1 (patch) | |
| tree | 782e13d4281bdf32eec8492fd5ee2deace187ba8 /arch/powerpc/platforms/powernv/pci.h | |
| parent | bdcb1aefc5b3f7d0f1dc8b02673602bca2ff7a4b (diff) | |
| download | linux-7f2c39e91f61fcd2abed3b39c14e7037c060c6f1.tar.gz linux-7f2c39e91f61fcd2abed3b39c14e7037c060c6f1.tar.bz2 linux-7f2c39e91f61fcd2abed3b39c14e7037c060c6f1.zip | |
powerpc/powernv: Introduce new PHB type for opencapi links
The NPU was already abstracted by opal as a virtual PHB for nvlink,
but it helps to be able to differentiate between a nvlink or opencapi
PHB, as it's not completely transparent to linux. In particular, PE
assignment differs and we'll also need the information in later
patches.
So rename existing PNV_PHB_NPU type to PNV_PHB_NPU_NVLINK and add a
new type PNV_PHB_NPU_OCAPI.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/platforms/powernv/pci.h')
| -rw-r--r-- | arch/powerpc/platforms/powernv/pci.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h index b772d7473896..eada4b6068cb 100644 --- a/arch/powerpc/platforms/powernv/pci.h +++ b/arch/powerpc/platforms/powernv/pci.h @@ -12,9 +12,10 @@ struct pci_dn; #define NV_NMMU_ATSD_REGS 8 enum pnv_phb_type { - PNV_PHB_IODA1 = 0, - PNV_PHB_IODA2 = 1, - PNV_PHB_NPU = 2, + PNV_PHB_IODA1 = 0, + PNV_PHB_IODA2 = 1, + PNV_PHB_NPU_NVLINK = 2, + PNV_PHB_NPU_OCAPI = 3, }; /* Precise PHB model for error management */ @@ -227,6 +228,7 @@ extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl, extern void pnv_pci_init_ioda_hub(struct device_node *np); extern void pnv_pci_init_ioda2_phb(struct device_node *np); extern void pnv_pci_init_npu_phb(struct device_node *np); +extern void pnv_pci_init_npu2_opencapi_phb(struct device_node *np); extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev); extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option); |