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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 18:03:34 +0900
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 18:03:34 +0900
commit8599cf059209de22dd3be16816b90f1aad10c74a (patch)
tree8cd5bdec25431a2797147c3eea11532ec71b6272 /arch/sh/boards/dreamcast/irq.c
parentba463937ef75bceaf3943edf01f849257c68623a (diff)
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sh: Cleanup IRQ disabling for hardirq handlers.
The generic hardirq layer already takes care of a lot of the appropriate locking and disabling for us, no need to duplicate it in the handlers.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/dreamcast/irq.c')
-rw-r--r--arch/sh/boards/dreamcast/irq.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c
index 373a22e48ac4..5bf01f86c20c 100644
--- a/arch/sh/boards/dreamcast/irq.c
+++ b/arch/sh/boards/dreamcast/irq.c
@@ -10,7 +10,6 @@
*/
#include <linux/irq.h>
-
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/dreamcast/sysasic.h>
@@ -57,29 +56,23 @@
/* Disable the hardware event by masking its bit in its EMR */
static inline void disable_systemasic_irq(unsigned int irq)
{
- unsigned long flags;
__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
__u32 mask;
- local_irq_save(flags);
mask = inl(emr);
mask &= ~(1 << EVENT_BIT(irq));
outl(mask, emr);
- local_irq_restore(flags);
}
/* Enable the hardware event by setting its bit in its EMR */
static inline void enable_systemasic_irq(unsigned int irq)
{
- unsigned long flags;
__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
__u32 mask;
- local_irq_save(flags);
mask = inl(emr);
mask |= (1 << EVENT_BIT(irq));
outl(mask, emr);
- local_irq_restore(flags);
}
/* Acknowledge a hardware event by writing its bit back to its ESR */