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| author | Paul Mundt <lethal@linux-sh.org> | 2009-04-17 14:09:09 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2009-04-17 14:09:09 +0900 |
| commit | 0bbc9bc3189f24de946777af43c9033c8c4871e4 (patch) | |
| tree | 996a03383430848a62746d8ffb9c5035d0d9a4ca /arch/sh/drivers/pci/fixups-sdk7780.c | |
| parent | 7e4ba0d77c96d328ba968ddff4a464d4d2fa7abc (diff) | |
| download | linux-0bbc9bc3189f24de946777af43c9033c8c4871e4.tar.gz linux-0bbc9bc3189f24de946777af43c9033c8c4871e4.tar.bz2 linux-0bbc9bc3189f24de946777af43c9033c8c4871e4.zip | |
sh: pci: Set class/sub-class code correctly for SH7780 PCIC.
The SH7780 PCI host controller implements a configuration header that
requires a fair bit of hand-holding to initialize properly. By default
it appears as a pre-2.0 host controller given the zeroed out class code,
so fix this up properly.
Some boards that happened to be using the R7780RP version of the PCIC
fixups had set this correctly, but this belongs in the standard
initialization, and is by no means board specific.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci/fixups-sdk7780.c')
| -rw-r--r-- | arch/sh/drivers/pci/fixups-sdk7780.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c index c2957312b30b..004efd486ee3 100644 --- a/arch/sh/drivers/pci/fixups-sdk7780.c +++ b/arch/sh/drivers/pci/fixups-sdk7780.c @@ -16,8 +16,6 @@ int pci_fixup_pcic(struct pci_channel *chan) { - ctrl_outl(0x00000001, SH7780_PCI_VCR2); - /* Enable all interrupts, so we know what to fix */ pci_write_reg(chan, 0x0000C3FF, SH7780_PCIIMR); pci_write_reg(chan, 0x0000380F, SH7780_PCIAINTM); @@ -26,8 +24,6 @@ int pci_fixup_pcic(struct pci_channel *chan) pci_write_reg(chan, 0xFB00, SH7780_PCISTATUS); pci_write_reg(chan, 0x0047, SH7780_PCICMD); pci_write_reg(chan, 0x00, SH7780_PCIPIF); - pci_write_reg(chan, 0x00, SH7780_PCISUB); - pci_write_reg(chan, 0x06, SH7780_PCIBCC); pci_write_reg(chan, 0x1912, SH7780_PCISVID); pci_write_reg(chan, 0x0001, SH7780_PCISID); |