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authorPaul Mundt <lethal@linux-sh.org>2010-11-04 12:32:24 +0900
committerPaul Mundt <lethal@linux-sh.org>2010-11-04 12:32:24 +0900
commite2fcf74f3d3dabe8591732cd37869a0cc88ed7a5 (patch)
treeccc1efdfffdf6b9ca427f46bb135faaa44e00dd4 /arch/sh/mm/consistent.c
parente96ce8ebfd7427c7ce335028f6619fb549f366b2 (diff)
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sh: nommu: use 32-bit phys mode.
The nommu code has regressed somewhat in that 29BIT gets set for the SH-2/2A configs regardless of the fact that they are really 32BIT sans MMU or PMB. This does a bit of tidying to get nommu properly selecting 32BIT as it was before. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/consistent.c')
-rw-r--r--arch/sh/mm/consistent.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index 038793286990..40733a952402 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -79,21 +79,20 @@ void dma_generic_free_coherent(struct device *dev, size_t size,
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction)
{
-#if defined(CONFIG_CPU_SH5) || defined(CONFIG_PMB)
- void *p1addr = vaddr;
-#else
- void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr);
-#endif
+ void *addr;
+
+ addr = __in_29bit_mode() ?
+ (void *)P1SEGADDR((unsigned long)vaddr) : vaddr;
switch (direction) {
case DMA_FROM_DEVICE: /* invalidate only */
- __flush_invalidate_region(p1addr, size);
+ __flush_invalidate_region(addr, size);
break;
case DMA_TO_DEVICE: /* writeback only */
- __flush_wback_region(p1addr, size);
+ __flush_wback_region(addr, size);
break;
case DMA_BIDIRECTIONAL: /* writeback and invalidate */
- __flush_purge_region(p1addr, size);
+ __flush_purge_region(addr, size);
break;
default:
BUG();