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authorOlof Johansson <olof@lixom.net>2013-08-11 15:33:54 -0700
committerOlof Johansson <olof@lixom.net>2013-08-11 15:33:54 -0700
commit4ddbed9618724d52a7a79c1e10ef5adb46fcccf7 (patch)
treeffe64efb333d7dcdb5b2cf43ffef97b25261702c /arch/sh
parent16649596d701c0f4f767bbcad7da4d6343ba8a9e (diff)
parentfa8c5a811e0e7c3e1c49b2e58fcb4db549b5719a (diff)
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Merge tag 'boards-3.12' of git://git.infradead.org/linux-mvebu into next/boards
From Jason Cooper: mvebu boards changes for v3.12 - convert kirkwood, dove, orion5x to DT init of mv643xx_eth - _lots_ of board code removal :) - convert kirkwood, dove and orion5x to DT init of clocksource and irqchip * tag 'boards-3.12' of git://git.infradead.org/linux-mvebu: ARM: plat-orion: add reg offset to DT irq driver stub ARM: kirkwood: remove obsolete SDIO clock gate workaround ARM: kirkwood: convert to DT irqchip and clocksource ARM: dove: convert to DT irqchip and clocksource ARM: orion5x: update intc device tree node to new reg layout ARM: kirkwood: move device tree nodes to DT irqchip and clocksource ARM: dove: move device tree nodes to DT irqchip and clocksource ARM: orion5x: remove legacy mv643xx_eth board setup ARM: kirkwood: remove legacy clk alias for mv643xx_eth ARM: kirkwood: remove redundant DT board files ARM: dove: remove legacy mv643xx_eth setup ARM: orion5x: add gigabit ethernet and mvmdio device tree nodes ARM: kirkwood: add gigabit ethernet and mvmdio device tree nodes ARM: dove: add gigabit ethernet and mvmdio device tree nodes + Linux 3.11-rc2 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/kernel/cpu/init.c18
-rw-r--r--arch/sh/kernel/cpu/sh2/probe.c2
-rw-r--r--arch/sh/kernel/cpu/sh2a/probe.c2
-rw-r--r--arch/sh/kernel/cpu/sh3/probe.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/smp-shx3.c6
-rw-r--r--arch/sh/kernel/cpu/sh5/probe.c2
-rw-r--r--arch/sh/kernel/perf_event.c4
-rw-r--r--arch/sh/kernel/process.c2
-rw-r--r--arch/sh/kernel/setup.c2
-rw-r--r--arch/sh/kernel/smp.c8
-rw-r--r--arch/sh/kernel/traps_32.c2
-rw-r--r--arch/sh/kernel/traps_64.c2
-rw-r--r--arch/sh/mm/tlb-sh5.c2
14 files changed, 28 insertions, 28 deletions
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 61a07dafcd46..ecf83cd158dc 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -43,9 +43,9 @@
* peripherals (nofpu, nodsp, and so forth).
*/
#define onchip_setup(x) \
-static int x##_disabled __cpuinitdata = !cpu_has_##x; \
+static int x##_disabled = !cpu_has_##x; \
\
-static int __cpuinit x##_setup(char *opts) \
+static int x##_setup(char *opts) \
{ \
x##_disabled = 1; \
return 1; \
@@ -59,7 +59,7 @@ onchip_setup(dsp);
#define CPUOPM 0xff2f0000
#define CPUOPM_RABD (1 << 5)
-static void __cpuinit speculative_execution_init(void)
+static void speculative_execution_init(void)
{
/* Clear RABD */
__raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
@@ -78,7 +78,7 @@ static void __cpuinit speculative_execution_init(void)
#define EXPMASK_BRDSSLP (1 << 1)
#define EXPMASK_MMCAW (1 << 4)
-static void __cpuinit expmask_init(void)
+static void expmask_init(void)
{
unsigned long expmask = __raw_readl(EXPMASK);
@@ -217,7 +217,7 @@ static void detect_cache_shape(void)
l2_cache_shape = -1; /* No S-cache */
}
-static void __cpuinit fpu_init(void)
+static void fpu_init(void)
{
/* Disable the FPU */
if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) {
@@ -230,7 +230,7 @@ static void __cpuinit fpu_init(void)
}
#ifdef CONFIG_SH_DSP
-static void __cpuinit release_dsp(void)
+static void release_dsp(void)
{
unsigned long sr;
@@ -244,7 +244,7 @@ static void __cpuinit release_dsp(void)
);
}
-static void __cpuinit dsp_init(void)
+static void dsp_init(void)
{
unsigned long sr;
@@ -276,7 +276,7 @@ static void __cpuinit dsp_init(void)
release_dsp();
}
#else
-static inline void __cpuinit dsp_init(void) { }
+static inline void dsp_init(void) { }
#endif /* CONFIG_SH_DSP */
/**
@@ -295,7 +295,7 @@ static inline void __cpuinit dsp_init(void) { }
* Each processor family is still responsible for doing its own probing
* and cache configuration in cpu_probe().
*/
-asmlinkage void __cpuinit cpu_init(void)
+asmlinkage void cpu_init(void)
{
current_thread_info()->cpu = hard_smp_processor_id();
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index bab8e75958ae..6c687ae812ef 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -13,7 +13,7 @@
#include <asm/processor.h>
#include <asm/cache.h>
-void __cpuinit cpu_probe(void)
+void cpu_probe(void)
{
#if defined(CONFIG_CPU_SUBTYPE_SH7619)
boot_cpu_data.type = CPU_SH7619;
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 5170b6aa4129..3f87971082f1 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -13,7 +13,7 @@
#include <asm/processor.h>
#include <asm/cache.h>
-void __cpuinit cpu_probe(void)
+void cpu_probe(void)
{
boot_cpu_data.family = CPU_FAMILY_SH2A;
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index bf23c322e164..426e1e1dcedc 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -16,7 +16,7 @@
#include <asm/cache.h>
#include <asm/io.h>
-void __cpuinit cpu_probe(void)
+void cpu_probe(void)
{
unsigned long addr0, addr1, data0, data1, data2, data3;
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 0fbbd50bc8ad..a521bcf50695 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -15,7 +15,7 @@
#include <asm/processor.h>
#include <asm/cache.h>
-void __cpuinit cpu_probe(void)
+void cpu_probe(void)
{
unsigned long pvr, prr, cvr;
unsigned long size;
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
index 03f2b55757cf..4a298808789c 100644
--- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -124,7 +124,7 @@ static void shx3_update_boot_vector(unsigned int cpu)
__raw_writel(STBCR_RESET, STBCR_REG(cpu));
}
-static int __cpuinit
+static int
shx3_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
{
unsigned int cpu = (unsigned int)hcpu;
@@ -143,11 +143,11 @@ shx3_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
return NOTIFY_OK;
}
-static struct notifier_block __cpuinitdata shx3_cpu_notifier = {
+static struct notifier_block shx3_cpu_notifier = {
.notifier_call = shx3_cpu_callback,
};
-static int __cpuinit register_shx3_cpu_notifier(void)
+static int register_shx3_cpu_notifier(void)
{
register_hotcpu_notifier(&shx3_cpu_notifier);
return 0;
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 9e882409e4e9..eca427c2f2f3 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -17,7 +17,7 @@
#include <asm/cache.h>
#include <asm/tlb.h>
-void __cpuinit cpu_probe(void)
+void cpu_probe(void)
{
unsigned long long cir;
diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c
index 068b8a2759b5..b9cefebda55c 100644
--- a/arch/sh/kernel/perf_event.c
+++ b/arch/sh/kernel/perf_event.c
@@ -367,7 +367,7 @@ static void sh_pmu_setup(int cpu)
memset(cpuhw, 0, sizeof(struct cpu_hw_events));
}
-static int __cpuinit
+static int
sh_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
{
unsigned int cpu = (long)hcpu;
@@ -384,7 +384,7 @@ sh_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
return NOTIFY_OK;
}
-int __cpuinit register_sh_pmu(struct sh_pmu *_pmu)
+int register_sh_pmu(struct sh_pmu *_pmu)
{
if (sh_pmu)
return -EBUSY;
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 055d91b70305..53bc6c4c84ec 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -65,7 +65,7 @@ void arch_task_cache_init(void)
# define HAVE_SOFTFP 0
#endif
-void __cpuinit init_thread_xstate(void)
+void init_thread_xstate(void)
{
if (boot_cpu_data.flags & CPU_HAS_FPU)
xstate_size = sizeof(struct sh_fpu_hard_struct);
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index ebe7a7d97215..1cf90e947dbf 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -172,7 +172,7 @@ disable:
#endif
}
-void __cpuinit calibrate_delay(void)
+void calibrate_delay(void)
{
struct clk *clk = clk_get(NULL, "cpu_clk");
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 45696451f0ea..86a7936a980b 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -37,7 +37,7 @@ struct plat_smp_ops *mp_ops = NULL;
/* State of each CPU */
DEFINE_PER_CPU(int, cpu_state) = { 0 };
-void __cpuinit register_smp_ops(struct plat_smp_ops *ops)
+void register_smp_ops(struct plat_smp_ops *ops)
{
if (mp_ops)
printk(KERN_WARNING "Overriding previously set SMP ops\n");
@@ -45,7 +45,7 @@ void __cpuinit register_smp_ops(struct plat_smp_ops *ops)
mp_ops = ops;
}
-static inline void __cpuinit smp_store_cpu_info(unsigned int cpu)
+static inline void smp_store_cpu_info(unsigned int cpu)
{
struct sh_cpuinfo *c = cpu_data + cpu;
@@ -174,7 +174,7 @@ void native_play_dead(void)
}
#endif
-asmlinkage void __cpuinit start_secondary(void)
+asmlinkage void start_secondary(void)
{
unsigned int cpu = smp_processor_id();
struct mm_struct *mm = &init_mm;
@@ -215,7 +215,7 @@ extern struct {
void *thread_info;
} stack_start;
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tsk)
+int __cpu_up(unsigned int cpu, struct task_struct *tsk)
{
unsigned long timeout;
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 5f513a64dedf..68e99f09171d 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -741,7 +741,7 @@ asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
die_if_kernel("exception", regs, ex);
}
-void __cpuinit per_cpu_trap_init(void)
+void per_cpu_trap_init(void)
{
extern void *vbr_base;
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index f87d20da1791..112ea11c030d 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -810,7 +810,7 @@ asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0);
}
-void __cpuinit per_cpu_trap_init(void)
+void per_cpu_trap_init(void)
{
/* Nothing to do for now, VBR initialization later. */
}
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c
index ff1c40a31cbc..e4bb2a8e0a69 100644
--- a/arch/sh/mm/tlb-sh5.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -17,7 +17,7 @@
/**
* sh64_tlb_init - Perform initial setup for the DTLB and ITLB.
*/
-int __cpuinit sh64_tlb_init(void)
+int sh64_tlb_init(void)
{
/* Assign some sane DTLB defaults */
cpu_data->dtlb.entries = 64;