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| author | Ingo Molnar <mingo@kernel.org> | 2017-08-11 13:51:59 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2017-08-11 13:51:59 +0200 |
| commit | 040cca3ab2f6f8b8d26e0e4965abea2b9aa14818 (patch) | |
| tree | 25709ba52ee06fccf4bfbfbf2897bb8cf86da828 /arch/sparc/mm | |
| parent | ef0758dd0fd70b98b889af26e27f003656952db8 (diff) | |
| parent | b2dbdf2ca1d2803e9cdc46a94554c4a39ffb235a (diff) | |
| download | linux-040cca3ab2f6f8b8d26e0e4965abea2b9aa14818.tar.gz linux-040cca3ab2f6f8b8d26e0e4965abea2b9aa14818.tar.bz2 linux-040cca3ab2f6f8b8d26e0e4965abea2b9aa14818.zip | |
Merge branch 'linus' into locking/core, to resolve conflicts
Conflicts:
include/linux/mm_types.h
mm/huge_memory.c
I removed the smp_mb__before_spinlock() like the following commit does:
8b1b436dd1cc ("mm, locking: Rework {set,clear,mm}_tlb_flush_pending()")
and fixed up the affected commits.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/sparc/mm')
| -rw-r--r-- | arch/sparc/mm/init_64.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c index fed73f14aa49..afa0099f3748 100644 --- a/arch/sparc/mm/init_64.c +++ b/arch/sparc/mm/init_64.c @@ -1944,12 +1944,22 @@ static void __init setup_page_offset(void) break; case SUN4V_CHIP_SPARC_M7: case SUN4V_CHIP_SPARC_SN: - default: /* M7 and later support 52-bit virtual addresses. */ sparc64_va_hole_top = 0xfff8000000000000UL; sparc64_va_hole_bottom = 0x0008000000000000UL; max_phys_bits = 49; break; + case SUN4V_CHIP_SPARC_M8: + default: + /* M8 and later support 54-bit virtual addresses. + * However, restricting M8 and above VA bits to 53 + * as 4-level page table cannot support more than + * 53 VA bits. + */ + sparc64_va_hole_top = 0xfff0000000000000UL; + sparc64_va_hole_bottom = 0x0010000000000000UL; + max_phys_bits = 51; + break; } } @@ -2161,6 +2171,7 @@ static void __init sun4v_linear_pte_xor_finalize(void) */ switch (sun4v_chip_type) { case SUN4V_CHIP_SPARC_M7: + case SUN4V_CHIP_SPARC_M8: case SUN4V_CHIP_SPARC_SN: pagecv_flag = 0x00; break; @@ -2313,6 +2324,7 @@ void __init paging_init(void) */ switch (sun4v_chip_type) { case SUN4V_CHIP_SPARC_M7: + case SUN4V_CHIP_SPARC_M8: case SUN4V_CHIP_SPARC_SN: page_cache4v_flag = _PAGE_CP_4V; break; |