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author | Chris Metcalf <cmetcalf@tilera.com> | 2013-08-15 16:23:24 -0400 |
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committer | Chris Metcalf <cmetcalf@tilera.com> | 2013-09-03 14:53:29 -0400 |
commit | d7c9661115fd23b4dabb710b3080dd9919dfa891 (patch) | |
tree | 5eaeb8c4aab296f39d6aa896ec9408419ec17441 /arch/tile/include/asm/barrier.h | |
parent | d6a0aa314c06743b702931cb468f400b7615c5c9 (diff) | |
download | linux-d7c9661115fd23b4dabb710b3080dd9919dfa891.tar.gz linux-d7c9661115fd23b4dabb710b3080dd9919dfa891.tar.bz2 linux-d7c9661115fd23b4dabb710b3080dd9919dfa891.zip |
tile: remove support for TILE64
This chip is no longer being actively developed for (it was superceded
by the TILEPro64 in 2008), and in any case the existing compiler and
toolchain in the community do not support it. It's unlikely that the
kernel works with TILE64 at this point as the configuration has not been
tested in years. The support is also awkward as it requires maintaining
a significant number of ifdefs. So, just remove it altogether.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include/asm/barrier.h')
-rw-r--r-- | arch/tile/include/asm/barrier.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/tile/include/asm/barrier.h b/arch/tile/include/asm/barrier.h index 990a217a0b72..a9a73da5865d 100644 --- a/arch/tile/include/asm/barrier.h +++ b/arch/tile/include/asm/barrier.h @@ -77,7 +77,6 @@ #define __sync() __insn_mf() -#if !CHIP_HAS_MF_WAITS_FOR_VICTIMS() #include <hv/syscall_public.h> /* * Issue an uncacheable load to each memory controller, then @@ -96,7 +95,6 @@ static inline void __mb_incoherent(void) "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29"); } -#endif /* Fence to guarantee visibility of stores to incoherent memory. */ static inline void @@ -104,7 +102,6 @@ mb_incoherent(void) { __insn_mf(); -#if !CHIP_HAS_MF_WAITS_FOR_VICTIMS() { #if CHIP_HAS_TILE_WRITE_PENDING() const unsigned long WRITE_TIMEOUT_CYCLES = 400; @@ -116,7 +113,6 @@ mb_incoherent(void) #endif /* CHIP_HAS_TILE_WRITE_PENDING() */ (void) __mb_incoherent(); } -#endif /* CHIP_HAS_MF_WAITS_FOR_VICTIMS() */ } #define fast_wmb() __sync() |