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authorChris Metcalf <cmetcalf@tilera.com>2012-03-29 15:36:53 -0400
committerChris Metcalf <cmetcalf@tilera.com>2012-04-02 12:13:05 -0400
commit12400f1f22ad7651efa1d3d06dd8b6b178d19ea3 (patch)
tree7654198e93cc3adda551c31dd19630c01e94e8b5 /arch/tile/mm/pgtable.c
parent48292738d06d7b46d861652ef59bd03be931c2c9 (diff)
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arch/tile: don't set the homecache of a PTE unless appropriate
We make sure not to try to set the home for an MMIO PTE (on tilegx) or a PTE that isn't referencing memory managed by Linux. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/mm/pgtable.c')
-rw-r--r--arch/tile/mm/pgtable.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/tile/mm/pgtable.c b/arch/tile/mm/pgtable.c
index 87303693a072..6b9a109c3e31 100644
--- a/arch/tile/mm/pgtable.c
+++ b/arch/tile/mm/pgtable.c
@@ -469,10 +469,18 @@ void __set_pte(pte_t *ptep, pte_t pte)
void set_pte(pte_t *ptep, pte_t pte)
{
- struct page *page = pfn_to_page(pte_pfn(pte));
-
- /* Update the home of a PTE if necessary */
- pte = pte_set_home(pte, page_home(page));
+ if (pte_present(pte) &&
+ (!CHIP_HAS_MMIO() || hv_pte_get_mode(pte) != HV_PTE_MODE_MMIO)) {
+ /* The PTE actually references physical memory. */
+ unsigned long pfn = pte_pfn(pte);
+ if (pfn_valid(pfn)) {
+ /* Update the home of the PTE from the struct page. */
+ pte = pte_set_home(pte, page_home(pfn_to_page(pfn)));
+ } else if (hv_pte_get_mode(pte) == 0) {
+ /* remap_pfn_range(), etc, must supply PTE mode. */
+ panic("set_pte(): out-of-range PFN and mode 0\n");
+ }
+ }
__set_pte(ptep, pte);
}