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| author | Will Deacon <will.deacon@arm.com> | 2013-09-04 11:34:08 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2014-10-20 18:49:18 +0100 |
| commit | 579cadee96542200b69efa3bda7ec4898c8153f6 (patch) | |
| tree | fdbcf67d0bfbcda496b5483a54a2d1a162468627 /arch/tile | |
| parent | 1191ccb34cf810a0fefaaf5ca3cfe3c5d7675927 (diff) | |
| download | linux-579cadee96542200b69efa3bda7ec4898c8153f6.tar.gz linux-579cadee96542200b69efa3bda7ec4898c8153f6.tar.bz2 linux-579cadee96542200b69efa3bda7ec4898c8153f6.zip | |
tile: io: implement dummy relaxed accessor macros for writes
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to tile, in the
same vein as the dummy definitions for the relaxed read accessors.
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/tile')
| -rw-r--r-- | arch/tile/include/asm/io.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/tile/include/asm/io.h b/arch/tile/include/asm/io.h index 9fe434969fab..d372641054d9 100644 --- a/arch/tile/include/asm/io.h +++ b/arch/tile/include/asm/io.h @@ -241,6 +241,10 @@ static inline void writeq(u64 val, unsigned long addr) #define readw_relaxed readw #define readl_relaxed readl #define readq_relaxed readq +#define writeb_relaxed writeb +#define writew_relaxed writew +#define writel_relaxed writel +#define writeq_relaxed writeq #define ioread8 readb #define ioread16 readw |