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author | Ingo Molnar <mingo@kernel.org> | 2018-01-30 15:08:27 +0100 |
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committer | Ingo Molnar <mingo@kernel.org> | 2018-01-30 15:08:27 +0100 |
commit | 7e86548e2cc8d308cb75439480f428137151b0de (patch) | |
tree | fa3bcdedb64f4642a21080bc2b4ddc69ce2b2285 /arch/x86/kernel/cpu/intel.c | |
parent | 64e16720ea0879f8ab4547e3b9758936d483909b (diff) | |
parent | d8a5b80568a9cb66810e75b182018e9edb68e8ff (diff) | |
download | linux-7e86548e2cc8d308cb75439480f428137151b0de.tar.gz linux-7e86548e2cc8d308cb75439480f428137151b0de.tar.bz2 linux-7e86548e2cc8d308cb75439480f428137151b0de.zip |
Merge tag 'v4.15' into x86/pti, to be able to merge dependent changes
Time has come to switch PTI development over to a v4.15 base - we'll still
try to make sure that all PTI fixes backport cleanly to v4.14 and earlier.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/intel.c')
-rw-r--r-- | arch/x86/kernel/cpu/intel.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 0c8b916abced..6936d14d4c77 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -264,21 +264,6 @@ static void early_init_intel(struct cpuinfo_x86 *c) if (c->x86 == 6 && c->x86_model < 15) clear_cpu_cap(c, X86_FEATURE_PAT); -#ifdef CONFIG_KMEMCHECK - /* - * P4s have a "fast strings" feature which causes single- - * stepping REP instructions to only generate a #DB on - * cache-line boundaries. - * - * Ingo Molnar reported a Pentium D (model 6) and a Xeon - * (model 2) with the same problem. - */ - if (c->x86 == 15) - if (msr_clear_bit(MSR_IA32_MISC_ENABLE, - MSR_IA32_MISC_ENABLE_FAST_STRING_BIT) > 0) - pr_info("kmemcheck: Disabling fast string operations\n"); -#endif - /* * If fast string is not enabled in IA32_MISC_ENABLE for any reason, * clear the fast string and enhanced fast string CPU capabilities. |