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author | Peter Zijlstra <peterz@infradead.org> | 2010-03-26 14:08:44 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2010-03-26 15:47:24 +0100 |
commit | 11164cd4f6dab326a88bdf27f2f8f7c11977e91a (patch) | |
tree | 260a9f48f66cce8c5f4e23111ba6be8af6cfa578 /arch/x86/kernel/cpu/perf_event_p4.c | |
parent | ea8e61b7bbc4a2faef77db34eb2db2a2c2372ff6 (diff) | |
download | linux-11164cd4f6dab326a88bdf27f2f8f7c11977e91a.tar.gz linux-11164cd4f6dab326a88bdf27f2f8f7c11977e91a.tar.bz2 linux-11164cd4f6dab326a88bdf27f2f8f7c11977e91a.zip |
perf, x86: Add Nehelem PMU programming errata workaround
Implement the workaround for Intel Errata AAK100 and AAP53.
Also, remove the Core-i7 name for Nehalem events since there are
also Westmere based i7 chips.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@google.com>
LKML-Reference: <1269608924.12097.147.camel@laptop>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_p4.c')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_p4.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c index f8fe069f14e2..0d1be36cbe9e 100644 --- a/arch/x86/kernel/cpu/perf_event_p4.c +++ b/arch/x86/kernel/cpu/perf_event_p4.c @@ -535,7 +535,7 @@ static void p4_pmu_enable_event(struct perf_event *event) (cccr & ~P4_CCCR_RESERVED) | P4_CCCR_ENABLE); } -static void p4_pmu_enable_all(void) +static void p4_pmu_enable_all(int added) { struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); int idx; |