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| author | Adrian Hunter <adrian.hunter@intel.com> | 2017-05-19 10:50:30 +0300 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2017-06-27 11:58:04 -0300 |
| commit | d5b1a5f660b8594125ea2a372286d767e756102f (patch) | |
| tree | dba0508c8f9142ccba5c0bbdf298ea3b29633139 /arch/x86/lib | |
| parent | 19f0edb980a0f66ccd80b712dadb0239782f8af5 (diff) | |
| download | linux-d5b1a5f660b8594125ea2a372286d767e756102f.tar.gz linux-d5b1a5f660b8594125ea2a372286d767e756102f.tar.bz2 linux-d5b1a5f660b8594125ea2a372286d767e756102f.zip | |
x86/insn: perf tools: Add new ptwrite instruction
Add ptwrite to the op code map and the perf tools new instructions test.
To run the test:
$ tools/perf/perf test "x86 ins"
39: Test x86 instruction decoder - new instructions : Ok
Or to see the details:
$ tools/perf/perf test -v "x86 ins" 2>&1 | grep ptwrite
For information about ptwrite, refer the Intel SDM.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Link: http://lkml.kernel.org/r/1495180230-19367-1-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'arch/x86/lib')
| -rw-r--r-- | arch/x86/lib/x86-opcode-map.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt index 767be7c76034..12e377184ee4 100644 --- a/arch/x86/lib/x86-opcode-map.txt +++ b/arch/x86/lib/x86-opcode-map.txt @@ -1009,7 +1009,7 @@ GrpTable: Grp15 1: fxstor | RDGSBASE Ry (F3),(11B) 2: vldmxcsr Md (v1) | WRFSBASE Ry (F3),(11B) 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) -4: XSAVE +4: XSAVE | ptwrite Ey (F3),(11B) 5: XRSTOR | lfence (11B) 6: XSAVEOPT | clwb (66) | mfence (11B) 7: clflush | clflushopt (66) | sfence (11B) |