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author | Chris McDermott <lcm@us.ibm.com> | 2006-02-11 17:55:50 -0800 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-11 21:41:11 -0800 |
commit | 33042a9ff4d126ba944b9dc3076665a2029e0a34 (patch) | |
tree | d5cf22cebc02316058ad860feecef20742a4ae5e /arch/x86_64/kernel/apic.c | |
parent | e00d82d07fb112446586d225763d3572e64b7abf (diff) | |
download | linux-33042a9ff4d126ba944b9dc3076665a2029e0a34.tar.gz linux-33042a9ff4d126ba944b9dc3076665a2029e0a34.tar.bz2 linux-33042a9ff4d126ba944b9dc3076665a2029e0a34.zip |
[PATCH] x86-64: Fix HPET timer on x460
[description from AK]
The IBM Summit 3 chipset doesn't implement the HPET timer replacement
option. Since the current Linux code relies on it use a mixed mode with
both PIT for the interrupt and HPET counters for the time keeping. That
was already implemented, but didn't work properly because it was still
using the last interrupt offset in HPET. This resulted in x460 not
booting. Fix this up by using the free running HPET counter.
Shouldn't affect any other machine because they either use full HPET mode
or no HPET at all.
TBD needs a similar 32bit fix.
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com>
Cc: Bob Picco <bob.picco@hp.com>
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: john stultz <johnstul@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64/kernel/apic.c')
-rw-r--r-- | arch/x86_64/kernel/apic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c index 6147770b4347..7a0a3e8d5d72 100644 --- a/arch/x86_64/kernel/apic.c +++ b/arch/x86_64/kernel/apic.c @@ -708,7 +708,7 @@ static void setup_APIC_timer(unsigned int clocks) local_irq_save(flags); /* wait for irq slice */ - if (vxtime.hpet_address) { + if (vxtime.hpet_address && hpet_use_timer) { int trigger = hpet_readl(HPET_T0_CMP); while (hpet_readl(HPET_COUNTER) >= trigger) /* do nothing */ ; |