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authorDavid Woodhouse <dwmw2@infradead.org>2006-05-16 01:19:52 +0100
committerDavid Woodhouse <dwmw2@infradead.org>2006-05-16 01:19:52 +0100
commit18594822fcb01d4b35e05b9018f770a0b4156d1a (patch)
tree38d35c38086a564beaac215f8e52694cdbfab1c3 /arch/x86_64/kernel/mpparse.c
parent5b5ffbc1e6d62d89747f3f59c09b2e488a7d7fce (diff)
parentc4694c76ce28dd7e415b4f3014d8c6e580b5f3d2 (diff)
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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'arch/x86_64/kernel/mpparse.c')
-rw-r--r--arch/x86_64/kernel/mpparse.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index b17cf3eba359..083da7e606b1 100644
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -968,7 +968,17 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
*/
int irq = gsi;
if (gsi < MAX_GSI_NUM) {
- if (gsi > 15)
+ /*
+ * Retain the VIA chipset work-around (gsi > 15), but
+ * avoid a problem where the 8254 timer (IRQ0) is setup
+ * via an override (so it's not on pin 0 of the ioapic),
+ * and at the same time, the pin 0 interrupt is a PCI
+ * type. The gsi > 15 test could cause these two pins
+ * to be shared as IRQ0, and they are not shareable.
+ * So test for this condition, and if necessary, avoid
+ * the pin collision.
+ */
+ if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0))
gsi = pci_irq++;
/*
* Don't assign IRQ used by ACPI SCI