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authorMax Filippov <jcmvbkbc@gmail.com>2015-08-25 09:04:12 +0300
committerChris Zankel <chris@zankel.net>2016-03-11 08:53:31 +0000
commitd99434e1760b94e08512821b5a05992398c1aa9e (patch)
treee2f871abcee6bf67825251a124fb8da5a813fd31 /arch/xtensa/boot
parentabfbd89595e91d5108f807e10bbd2152bc55f36b (diff)
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xtensa: xtfpga: fix ethernet controller endianness
Ethernet controller is attached to XTFPGA boards as native endian device, mark it as such in DTS and pass correct endianness in platform data. This makes network functional on big-endian CPUs. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/boot')
-rw-r--r--arch/xtensa/boot/dts/xtfpga.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi
index be3fd769677a..de133badcdc9 100644
--- a/arch/xtensa/boot/dts/xtfpga.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga.dtsi
@@ -69,6 +69,7 @@
enet0: ethoc@0d030000 {
compatible = "opencores,ethoc";
reg = <0x0d030000 0x4000 0x0d800000 0x4000>;
+ native-endian;
interrupts = <1 1>; /* external irq 1 */
local-mac-address = [00 50 c2 13 6f 00];
clocks = <&osc>;