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author | Max Filippov <jcmvbkbc@gmail.com> | 2020-01-31 18:48:43 -0800 |
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committer | Max Filippov <jcmvbkbc@gmail.com> | 2020-02-04 21:53:39 -0800 |
commit | 50722f0bf631cfcbcce18dac6b3fb5c2b6432628 (patch) | |
tree | 23ec7b5989f9cf6f1c987daeafd1ee60d148dbb6 /arch/xtensa/kernel/coprocessor.S | |
parent | 58bc6c69afe51ed19d1294ab0bb319b7df1cf75a (diff) | |
download | linux-50722f0bf631cfcbcce18dac6b3fb5c2b6432628.tar.gz linux-50722f0bf631cfcbcce18dac6b3fb5c2b6432628.tar.bz2 linux-50722f0bf631cfcbcce18dac6b3fb5c2b6432628.zip |
xtensa: move fast exception handlers close to vectors
On XIP kernels it makes sense to have exception vectors and fast
exception handlers together (in a fast memory). In addition, with MTD
XIP support both vectors and fast exception handlers must be outside of
the FLASH.
Add section .exception.text and move fast exception handlers to it.
Put it together with vectors when vectors are outside of the .text.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/kernel/coprocessor.S')
-rw-r--r-- | arch/xtensa/kernel/coprocessor.S | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/xtensa/kernel/coprocessor.S b/arch/xtensa/kernel/coprocessor.S index c53ce6d8794f..c426b846beef 100644 --- a/arch/xtensa/kernel/coprocessor.S +++ b/arch/xtensa/kernel/coprocessor.S @@ -58,6 +58,8 @@ .endif; \ .long THREAD_XTREGS_CP##x + __XTENSA_HANDLER + SAVE_CP_REGS(0) SAVE_CP_REGS(1) SAVE_CP_REGS(2) @@ -76,7 +78,6 @@ LOAD_CP_REGS(6) LOAD_CP_REGS(7) - .section ".rodata", "a" .align 4 .Lsave_cp_regs_jump_table: SAVE_CP_REGS_TAB(0) @@ -98,8 +99,6 @@ LOAD_CP_REGS_TAB(6) LOAD_CP_REGS_TAB(7) - .previous - /* * coprocessor_flush(struct thread_info*, index) * a2 a3 |