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| author | Max Filippov <jcmvbkbc@gmail.com> | 2019-05-12 20:28:25 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2019-07-08 10:04:48 -0700 |
| commit | d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a (patch) | |
| tree | 1780d36ac99c16f8ed506948a020017e84a89a9f /arch/xtensa/kernel/coprocessor.S | |
| parent | 831c4f3da83e260df943dfb982d77cef5cba2c49 (diff) | |
| download | linux-d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a.tar.gz linux-d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a.tar.bz2 linux-d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a.zip | |
xtensa: abstract 'entry' and 'retw' in assembly code
Provide abi_entry, abi_entry_default, abi_ret and abi_ret_default macros
that allocate aligned stack frame in windowed and call0 ABIs.
Provide XTENSA_SPILL_STACK_RESERVE macro that specifies required stack
frame size when register spilling is involved.
Replace all uses of 'entry' and 'retw' with the above macros.
This makes most of the xtensa assembly code ready for XEA3 and call0 ABI.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/kernel/coprocessor.S')
| -rw-r--r-- | arch/xtensa/kernel/coprocessor.S | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/xtensa/kernel/coprocessor.S b/arch/xtensa/kernel/coprocessor.S index 92bf24a9da92..60c220020054 100644 --- a/arch/xtensa/kernel/coprocessor.S +++ b/arch/xtensa/kernel/coprocessor.S @@ -121,7 +121,9 @@ ENTRY(coprocessor_flush) - entry a1, 32 + /* reserve 4 bytes on stack to save a0 */ + abi_entry(4) + s32i a0, a1, 0 movi a0, .Lsave_cp_regs_jump_table addx8 a3, a3, a0 @@ -131,7 +133,8 @@ ENTRY(coprocessor_flush) beqz a3, 1f callx0 a3 1: l32i a0, a1, 0 - retw + + abi_ret(4) ENDPROC(coprocessor_flush) |