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| author | Max Filippov <jcmvbkbc@gmail.com> | 2012-11-15 06:25:48 +0400 |
|---|---|---|
| committer | Chris Zankel <chris@zankel.net> | 2012-12-18 21:10:22 -0800 |
| commit | 733536b865441d9bad02c4711a4372d48ce21e54 (patch) | |
| tree | e54c74b6f27dab1175701128e1c0ac2a18cccdc3 /arch/xtensa/kernel | |
| parent | 2f6ea6a767e9e26d23e4de4b03fdebe41f3b88f8 (diff) | |
| download | linux-733536b865441d9bad02c4711a4372d48ce21e54.tar.gz linux-733536b865441d9bad02c4711a4372d48ce21e54.tar.bz2 linux-733536b865441d9bad02c4711a4372d48ce21e54.zip | |
xtensa: save and restore scompare1 SR on kernel entry
Although scompare1 may be saved/restored by xchal_ncp_{load,store}
macros, explicit save/restore of registers manipulated by the kernel
itself is considered more correct.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/kernel')
| -rw-r--r-- | arch/xtensa/kernel/asm-offsets.c | 1 | ||||
| -rw-r--r-- | arch/xtensa/kernel/entry.S | 13 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/xtensa/kernel/asm-offsets.c b/arch/xtensa/kernel/asm-offsets.c index 7dc3f9157185..845475afc683 100644 --- a/arch/xtensa/kernel/asm-offsets.c +++ b/arch/xtensa/kernel/asm-offsets.c @@ -41,6 +41,7 @@ int main(void) DEFINE(PT_SAR, offsetof (struct pt_regs, sar)); DEFINE(PT_ICOUNTLEVEL, offsetof (struct pt_regs, icountlevel)); DEFINE(PT_SYSCALL, offsetof (struct pt_regs, syscall)); + DEFINE(PT_SCOMPARE1, offsetof(struct pt_regs, scompare1)); DEFINE(PT_AREG, offsetof (struct pt_regs, areg[0])); DEFINE(PT_AREG0, offsetof (struct pt_regs, areg[0])); DEFINE(PT_AREG1, offsetof (struct pt_regs, areg[1])); diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index 41ad9cfe9a2a..4c2f2706ad5b 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S @@ -372,6 +372,13 @@ common_exception: s32i a2, a1, PT_LBEG s32i a3, a1, PT_LEND + /* Save SCOMPARE1 */ + +#if XCHAL_HAVE_S32C1I + rsr a2, scompare1 + s32i a2, a1, PT_SCOMPARE1 +#endif + /* Save optional registers. */ save_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT @@ -433,6 +440,12 @@ common_exception_return: load_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT + /* Restore SCOMPARE1 */ + +#if XCHAL_HAVE_S32C1I + l32i a2, a1, PT_SCOMPARE1 + wsr a2, scompare1 +#endif wsr a3, ps /* disable interrupts */ _bbci.l a3, PS_UM_BIT, kernel_exception_exit |