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| author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-25 16:23:57 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-29 14:48:10 +0200 |
| commit | 1ac06cdadf3f6e9c52cf87304238bffdf4c71566 (patch) | |
| tree | dab5adc13900cea9ed20c239ff2f6581cb3e0c73 /arch | |
| parent | 24a3f2e82bc8cf7ed05294008794f842cf170ea2 (diff) | |
| download | linux-1ac06cdadf3f6e9c52cf87304238bffdf4c71566.tar.gz linux-1ac06cdadf3f6e9c52cf87304238bffdf4c71566.tar.bz2 linux-1ac06cdadf3f6e9c52cf87304238bffdf4c71566.zip | |
powerpc: uic: Cleanup flow type handling
The core irq_set_type() function updates the flow type when the chip
callback returns 0. So setting the type is bogus. The core also
updates IRQ_LEVEL.
Use irq_data to get the level type information in the chip functions.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/sysdev/uic.c | 27 |
1 files changed, 10 insertions, 17 deletions
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index a68469ef36d0..02dc40f41bd2 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c @@ -57,7 +57,6 @@ struct uic { static void uic_unmask_irq(struct irq_data *d) { - struct irq_desc *desc = irq_to_desc(d->irq); struct uic *uic = irq_data_get_irq_chip_data(d); unsigned int src = uic_irq_to_hw(d->irq); unsigned long flags; @@ -66,7 +65,7 @@ static void uic_unmask_irq(struct irq_data *d) sr = 1 << (31-src); spin_lock_irqsave(&uic->lock, flags); /* ack level-triggered interrupts here */ - if (desc->status & IRQ_LEVEL) + if (irqd_is_level_type(d)) mtdcr(uic->dcrbase + UIC_SR, sr); er = mfdcr(uic->dcrbase + UIC_ER); er |= sr; @@ -101,7 +100,6 @@ static void uic_ack_irq(struct irq_data *d) static void uic_mask_ack_irq(struct irq_data *d) { - struct irq_desc *desc = irq_to_desc(d->irq); struct uic *uic = irq_data_get_irq_chip_data(d); unsigned int src = uic_irq_to_hw(d->irq); unsigned long flags; @@ -120,7 +118,7 @@ static void uic_mask_ack_irq(struct irq_data *d) * level interrupts are ack'ed after the actual * isr call in the uic_unmask_irq() */ - if (!(desc->status & IRQ_LEVEL)) + if (!irqd_is_level_type(d)) mtdcr(uic->dcrbase + UIC_SR, sr); spin_unlock_irqrestore(&uic->lock, flags); } @@ -129,7 +127,6 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) { struct uic *uic = irq_data_get_irq_chip_data(d); unsigned int src = uic_irq_to_hw(d->irq); - struct irq_desc *desc = irq_to_desc(d->irq); unsigned long flags; int trigger, polarity; u32 tr, pr, mask; @@ -166,11 +163,6 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) mtdcr(uic->dcrbase + UIC_PR, pr); mtdcr(uic->dcrbase + UIC_TR, tr); - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); - desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; - if (!trigger) - desc->status |= IRQ_LEVEL; - spin_unlock_irqrestore(&uic->lock, flags); return 0; @@ -221,16 +213,17 @@ static struct irq_host_ops uic_host_ops = { void uic_irq_cascade(unsigned int virq, struct irq_desc *desc) { struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_data *idata = irq_desc_get_irq_data(desc); struct uic *uic = get_irq_data(virq); u32 msr; int src; int subvirq; raw_spin_lock(&desc->lock); - if (desc->status & IRQ_LEVEL) - chip->irq_mask(&desc->irq_data); + if (irqd_is_level_type(idata)) + chip->irq_mask(idata); else - chip->irq_mask_ack(&desc->irq_data); + chip->irq_mask_ack(idata); raw_spin_unlock(&desc->lock); msr = mfdcr(uic->dcrbase + UIC_MSR); @@ -244,10 +237,10 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc) uic_irq_ret: raw_spin_lock(&desc->lock); - if (irqd_is_level_type(&desc->irq_data)) - chip->irq_ack(&desc->irq_data); - if (!(irq_is_disabled(&desc->irq_data) && chip->irq_unmask) - chip->irq_unmask(&desc->irq_data); + if (irqd_is_level_type(idata)) + chip->irq_ack(idata); + if (!irqd_irq_disabled(idata) && chip->irq_unmask) + chip->irq_unmask(idata); raw_spin_unlock(&desc->lock); } |