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authorBen Dooks <ben-linux@fluff.org>2010-10-01 13:52:25 +0900
committerKukjin Kim <kgene.kim@samsung.com>2010-10-23 11:49:14 +0900
commit699afb75de3e7a32a802513864c869f41868c3c8 (patch)
tree0e362b05e750dec4cc4f2566a81ef98324137bf4 /arch
parent2618b555d2734df3c8ca71df319d318489318083 (diff)
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ARM: S5P6442: Change to using s3c_gpio_cfgpin_range()
Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range(). Signed-off-by: Ben Dooks <ben-linux@fluff.org> [kgene.kim@samsung.com: fixed wrong change] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s5p6442/dev-audio.c30
-rw-r--r--arch/arm/mach-s5p6442/dev-spi.c3
2 files changed, 11 insertions, 22 deletions
diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c
index 7a4e34720b7b..3462197ff352 100644
--- a/arch/arm/mach-s5p6442/dev-audio.c
+++ b/arch/arm/mach-s5p6442/dev-audio.c
@@ -21,22 +21,16 @@
static int s5p6442_cfg_i2s(struct platform_device *pdev)
{
+ unsigned int base;
+
/* configure GPIO for i2s port */
switch (pdev->id) {
case 1:
- s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(2));
+ base = S5P6442_GPC1(0);
break;
case -1:
- s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(2));
+ base = S5P6442_GPC0(0);
break;
default:
@@ -44,6 +38,7 @@ static int s5p6442_cfg_i2s(struct platform_device *pdev)
return -EINVAL;
}
+ s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2));
return 0;
}
@@ -111,21 +106,15 @@ struct platform_device s5p6442_device_iis1 = {
static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev)
{
+ unsigned int base;
+
switch (pdev->id) {
case 0:
- s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(3));
- s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(3));
- s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(3));
- s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(3));
- s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(3));
+ base = S5P6442_GPC0(0);
break;
case 1:
- s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(3));
- s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(3));
- s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(3));
- s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(3));
- s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(3));
+ base = S5P6442_GPC1(0);
break;
default:
@@ -133,6 +122,7 @@ static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev)
return -EINVAL;
}
+ s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3));
return 0;
}
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c
index e894651a88bd..547c570f689a 100644
--- a/arch/arm/mach-s5p6442/dev-spi.c
+++ b/arch/arm/mach-s5p6442/dev-spi.c
@@ -38,8 +38,7 @@ static int s5p6442_spi_cfg_gpio(struct platform_device *pdev)
switch (pdev->id) {
case 0:
s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin_range(S5P6442_GPB(2), 2, S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP);