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| author | Olof Johansson <olof@lixom.net> | 2017-01-16 22:26:42 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2017-01-16 22:26:42 -0800 |
| commit | ddcb0a762b61e374cc9d0269da0d9abc44489bb4 (patch) | |
| tree | 5f907303b51001eb57a0c366db3905733dfa735e /arch | |
| parent | 53f56d6e239afb4a30ac8adbd31297ab55b357c8 (diff) | |
| parent | f3c05596344fa09074220513583bc5d6ff2d5c43 (diff) | |
| download | linux-ddcb0a762b61e374cc9d0269da0d9abc44489bb4.tar.gz linux-ddcb0a762b61e374cc9d0269da0d9abc44489bb4.tar.bz2 linux-ddcb0a762b61e374cc9d0269da0d9abc44489bb4.zip | |
Merge tag 'ux500-dev-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc
Some two collected patches simplifying some Ux500
stuff.
* tag 'ux500-dev-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: remove duplicated include from cpu-db8500.c
ARM: ux500: simplify secondary boot
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-ux500/cpu-db8500.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/platsmp.c | 45 |
2 files changed, 19 insertions, 27 deletions
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 46b1da1bf5d2..c0c36b978cba 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -12,7 +12,6 @@ #include <linux/init.h> #include <linux/device.h> #include <linux/amba/bus.h> -#include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/irqchip.h> diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 8f2f615ff958..e0ee139fdebf 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -31,10 +31,14 @@ #define UX500_CPU1_JUMPADDR_OFFSET 0x1FF4 #define UX500_CPU1_WAKEMAGIC_OFFSET 0x1FF0 -static void wakeup_secondary(void) +static void __iomem *backupram; + +static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) { struct device_node *np; - static void __iomem *backupram; + static void __iomem *scu_base; + unsigned int ncores; + int i; np = of_find_compatible_node(NULL, NULL, "ste,dbx500-backupram"); if (!np) { @@ -48,29 +52,6 @@ static void wakeup_secondary(void) return; } - /* - * write the address of secondary startup into the backup ram register - * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the - * backup ram register at offset 0x1FF0, which is what boot rom code - * is waiting for. This will wake up the secondary core from WFE. - */ - writel(virt_to_phys(secondary_startup), - backupram + UX500_CPU1_JUMPADDR_OFFSET); - writel(0xA1FEED01, - backupram + UX500_CPU1_WAKEMAGIC_OFFSET); - - /* make sure write buffer is drained */ - mb(); - iounmap(backupram); -} - -static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) -{ - struct device_node *np; - static void __iomem *scu_base; - unsigned int ncores; - int i; - np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); if (!np) { pr_err("No SCU base address\n"); @@ -92,7 +73,19 @@ static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) { - wakeup_secondary(); + /* + * write the address of secondary startup into the backup ram register + * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the + * backup ram register at offset 0x1FF0, which is what boot rom code + * is waiting for. This will wake up the secondary core from WFE. + */ + writel(virt_to_phys(secondary_startup), + backupram + UX500_CPU1_JUMPADDR_OFFSET); + writel(0xA1FEED01, + backupram + UX500_CPU1_WAKEMAGIC_OFFSET); + + /* make sure write buffer is drained */ + mb(); arch_send_wakeup_ipi_mask(cpumask_of(cpu)); return 0; } |