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authorRalf Baechle <ralf@linux-mips.org>2006-04-05 09:45:45 +0100
committerRalf Baechle <ralf@linux-mips.org>2006-04-19 04:14:22 +0200
commitbce1a28686ed6527977a198f698278b67c6bf9ec (patch)
tree814c2a32011c8f7279fb3244cf6215e1dd82a95d /arch
parenta682a2417007ad6265cd71b97b751753fd10e2fb (diff)
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[MIPS] R2: Instruction hazard barrier.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/kernel/entry.S15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 371571f4f280..b1939a486d2c 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -119,3 +119,18 @@ syscall_exit_work:
li a1, 1
jal do_syscall_trace
b resume_userspace
+
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
+
+/*
+ * MIPS32R2 Instruction Hazard Barrier - must be called
+ *
+ * For C code use the inline version named instruction_hazard().
+ */
+LEAF(mips_ihb)
+ .set mips32r2
+ jr.hb ra
+ nop
+ END(mips_ihb)
+
+#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */