diff options
author | Grant Likely <grant.likely@secretlab.ca> | 2007-10-09 14:45:28 -0600 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2007-10-10 10:22:04 -0600 |
commit | 4de3b992a6880828943f1b5849e1e7153fe4185c (patch) | |
tree | f020001483d877540a17297c9d9b3bfb6d9582fd /arch | |
parent | 9fe2e7969d5e5af7dbd2086f2e18f4ebc585490d (diff) | |
download | linux-4de3b992a6880828943f1b5849e1e7153fe4185c.tar.gz linux-4de3b992a6880828943f1b5849e1e7153fe4185c.tar.bz2 linux-4de3b992a6880828943f1b5849e1e7153fe4185c.zip |
[POWERPC] MPC5200: Don't make firmware fixups into common code
The Lite5200 u-boot image doesn't entirely configure the processor
correctly and so Linux needs to fixup the cpu setup in setup_arch. Fixing
the CPU setup is good, but making it into common code is not a good idea.
New board ports should be encouraged not to take the lead of the lite5200
and instead get their firmware to setup the CPU the right way.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Sylvain Munaut <tnt@246tnt.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/platforms/52xx/lite5200.c | 59 | ||||
-rw-r--r-- | arch/powerpc/platforms/52xx/mpc52xx_common.c | 35 |
2 files changed, 61 insertions, 33 deletions
diff --git a/arch/powerpc/platforms/52xx/lite5200.c b/arch/powerpc/platforms/52xx/lite5200.c index 7fa0ec8d91cc..0caa3d955c3b 100644 --- a/arch/powerpc/platforms/52xx/lite5200.c +++ b/arch/powerpc/platforms/52xx/lite5200.c @@ -30,19 +30,56 @@ * */ +/* + * Fix clock configuration. + * + * Firmware is supposed to be responsible for this. If you are creating a + * new board port, do *NOT* duplicate this code. Fix your boot firmware + * to set it correctly in the first place + */ +static void __init +lite5200_fix_clock_config(void) +{ + struct mpc52xx_cdm __iomem *cdm; + + /* Map zones */ + cdm = mpc52xx_find_and_map("mpc5200-cdm"); + if (!cdm) { + printk(KERN_ERR "%s() failed; expect abnormal behaviour\n", + __FUNCTION__); + return; + } + + /* Use internal 48 Mhz */ + out_8(&cdm->ext_48mhz_en, 0x00); + out_8(&cdm->fd_enable, 0x01); + if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */ + out_be16(&cdm->fd_counters, 0x0001); + else + out_be16(&cdm->fd_counters, 0x5555); + + /* Unmap the regs */ + iounmap(cdm); +} + +/* + * Fix setting of port_config register. + * + * Firmware is supposed to be responsible for this. If you are creating a + * new board port, do *NOT* duplicate this code. Fix your boot firmware + * to set it correctly in the first place + */ static void __init -lite5200_setup_cpu(void) +lite5200_fix_port_config(void) { struct mpc52xx_gpio __iomem *gpio; u32 port_config; - /* Map zones */ gpio = mpc52xx_find_and_map("mpc5200-gpio"); if (!gpio) { - printk(KERN_ERR __FILE__ ": " - "Error while mapping GPIO register for port config. " - "Expect some abnormal behavior\n"); - goto error; + printk(KERN_ERR "%s() failed. expect abnormal behavior\n", + __FUNCTION__); + return; } /* Set port config */ @@ -61,7 +98,6 @@ lite5200_setup_cpu(void) out_be32(&gpio->port_config, port_config); /* Unmap zone */ -error: iounmap(gpio); } @@ -100,9 +136,12 @@ static void __init lite5200_setup_arch(void) if (ppc_md.progress) ppc_md.progress("lite5200_setup_arch()", 0); - /* CPU & Port mux setup */ - mpc52xx_setup_cpu(); /* Generic */ - lite5200_setup_cpu(); /* Platorm specific */ + /* Fix things that firmware should have done. */ + lite5200_fix_clock_config(); + lite5200_fix_port_config(); + + /* Some mpc5200 & mpc5200b related configuration */ + mpc5200_setup_xlb_arbiter(); #ifdef CONFIG_PM mpc52xx_suspend.board_suspend_prepare = lite5200_suspend_prepare; diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c index 3eeb6c62e0ff..3bc201e07e6b 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_common.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c @@ -75,44 +75,33 @@ mpc52xx_find_ipb_freq(struct device_node *node) EXPORT_SYMBOL(mpc52xx_find_ipb_freq); +/* + * Configure the XLB arbiter settings to match what Linux expects. + */ void __init -mpc52xx_setup_cpu(void) +mpc5200_setup_xlb_arbiter(void) { - struct mpc52xx_cdm __iomem *cdm; struct mpc52xx_xlb __iomem *xlb; - /* Map zones */ - cdm = mpc52xx_find_and_map("mpc5200-cdm"); xlb = mpc52xx_find_and_map("mpc5200-xlb"); - - if (!cdm || !xlb) { + if (!xlb) { printk(KERN_ERR __FILE__ ": " - "Error while mapping CDM/XLB during mpc52xx_setup_cpu. " + "Error mapping XLB in mpc52xx_setup_cpu(). " "Expect some abnormal behavior\n"); - goto unmap_regs; + return; } - /* Use internal 48 Mhz */ - out_8(&cdm->ext_48mhz_en, 0x00); - out_8(&cdm->fd_enable, 0x01); - if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */ - out_be16(&cdm->fd_counters, 0x0001); - else - out_be16(&cdm->fd_counters, 0x5555); - /* Configure the XLB Arbiter priorities */ out_be32(&xlb->master_pri_enable, 0xff); out_be32(&xlb->master_priority, 0x11111111); - /* Disable XLB pipelining */ - /* (cfr errate 292. We could do this only just before ATA PIO - transaction and re-enable it afterwards ...) */ + /* Disable XLB pipelining + * (cfr errate 292. We could do this only just before ATA PIO + * transaction and re-enable it afterwards ...) + */ out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); - /* Unmap zones */ -unmap_regs: - if (cdm) iounmap(cdm); - if (xlb) iounmap(xlb); + iounmap(xlb); } void __init |