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| author | Ingo Molnar <mingo@elte.hu> | 2006-06-29 02:24:36 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-29 10:26:21 -0700 |
| commit | d1bef4ed5faf7d9872337b33c4269e45ae1bf960 (patch) | |
| tree | a88c58e3102396382e9137a25a884af14421f6a6 /arch | |
| parent | cfb9e32f2ff32ef5265c1c80fe68dd1a7f03a604 (diff) | |
| download | linux-d1bef4ed5faf7d9872337b33c4269e45ae1bf960.tar.gz linux-d1bef4ed5faf7d9872337b33c4269e45ae1bf960.tar.bz2 linux-d1bef4ed5faf7d9872337b33c4269e45ae1bf960.zip | |
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
135 files changed, 326 insertions, 322 deletions
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index da677f829f76..ec9d243d42c9 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c @@ -49,7 +49,7 @@ select_smp_affinity(unsigned int irq) static int last_cpu; int cpu = last_cpu + 1; - if (!irq_desc[irq].handler->set_affinity || irq_user_affinity[irq]) + if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq]) return 1; while (!cpu_possible(cpu)) @@ -57,7 +57,7 @@ select_smp_affinity(unsigned int irq) last_cpu = cpu; irq_affinity[irq] = cpumask_of_cpu(cpu); - irq_desc[irq].handler->set_affinity(irq, cpumask_of_cpu(cpu)); + irq_desc[irq].chip->set_affinity(irq, cpumask_of_cpu(cpu)); return 0; } #endif /* CONFIG_SMP */ @@ -93,7 +93,7 @@ show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[irq]); #endif - seq_printf(p, " %14s", irq_desc[irq].handler->typename); + seq_printf(p, " %14s", irq_desc[irq].chip->typename); seq_printf(p, " %c%s", (action->flags & SA_INTERRUPT)?'+':' ', action->name); diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c index 9d34ce26e5ef..f20f2dff9c43 100644 --- a/arch/alpha/kernel/irq_alpha.c +++ b/arch/alpha/kernel/irq_alpha.c @@ -233,7 +233,7 @@ void __init init_rtc_irq(void) { irq_desc[RTC_IRQ].status = IRQ_DISABLED; - irq_desc[RTC_IRQ].handler = &rtc_irq_type; + irq_desc[RTC_IRQ].chip = &rtc_irq_type; setup_irq(RTC_IRQ, &timer_irqaction); } diff --git a/arch/alpha/kernel/irq_i8259.c b/arch/alpha/kernel/irq_i8259.c index b188683b83fd..ac893bd48036 100644 --- a/arch/alpha/kernel/irq_i8259.c +++ b/arch/alpha/kernel/irq_i8259.c @@ -109,7 +109,7 @@ init_i8259a_irqs(void) for (i = 0; i < 16; i++) { irq_desc[i].status = IRQ_DISABLED; - irq_desc[i].handler = &i8259a_irq_type; + irq_desc[i].chip = &i8259a_irq_type; } setup_irq(2, &cascade); diff --git a/arch/alpha/kernel/irq_pyxis.c b/arch/alpha/kernel/irq_pyxis.c index 146a20b9e3d5..3b581415bab0 100644 --- a/arch/alpha/kernel/irq_pyxis.c +++ b/arch/alpha/kernel/irq_pyxis.c @@ -120,7 +120,7 @@ init_pyxis_irqs(unsigned long ignore_mask) if ((ignore_mask >> i) & 1) continue; irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &pyxis_irq_type; + irq_desc[i].chip = &pyxis_irq_type; } setup_irq(16+7, &isa_cascade_irqaction); diff --git a/arch/alpha/kernel/irq_srm.c b/arch/alpha/kernel/irq_srm.c index 0a87e466918c..8e4d121f84cc 100644 --- a/arch/alpha/kernel/irq_srm.c +++ b/arch/alpha/kernel/irq_srm.c @@ -67,7 +67,7 @@ init_srm_irqs(long max, unsigned long ignore_mask) if (i < 64 && ((ignore_mask >> i) & 1)) continue; irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &srm_irq_type; + irq_desc[i].chip = &srm_irq_type; } } diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c index d7f0e97fe56f..1a1a2c7a3d94 100644 --- a/arch/alpha/kernel/sys_alcor.c +++ b/arch/alpha/kernel/sys_alcor.c @@ -144,7 +144,7 @@ alcor_init_irq(void) if (i >= 16+20 && i <= 16+30) continue; irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &alcor_irq_type; + irq_desc[i].chip = &alcor_irq_type; } i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq; diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c index 8e3374d34c95..8c9e443d93ad 100644 --- a/arch/alpha/kernel/sys_cabriolet.c +++ b/arch/alpha/kernel/sys_cabriolet.c @@ -124,7 +124,7 @@ common_init_irq(void (*srm_dev_int)(unsigned long v, struct pt_regs *r)) for (i = 16; i < 35; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &cabriolet_irq_type; + irq_desc[i].chip = &cabriolet_irq_type; } } diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c index d5da6b1b28ee..b28c8f1c6e10 100644 --- a/arch/alpha/kernel/sys_dp264.c +++ b/arch/alpha/kernel/sys_dp264.c @@ -300,7 +300,7 @@ init_tsunami_irqs(struct hw_interrupt_type * ops, int imin, int imax) long i; for (i = imin; i <= imax; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = ops; + irq_desc[i].chip = ops; } } diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c index 61a79c354f0b..aeb8e0277905 100644 --- a/arch/alpha/kernel/sys_eb64p.c +++ b/arch/alpha/kernel/sys_eb64p.c @@ -137,7 +137,7 @@ eb64p_init_irq(void) for (i = 16; i < 32; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &eb64p_irq_type; + irq_desc[i].chip = &eb64p_irq_type; } common_init_isa_dma(); diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c index bd6e5f0e43c7..64a785baf53a 100644 --- a/arch/alpha/kernel/sys_eiger.c +++ b/arch/alpha/kernel/sys_eiger.c @@ -154,7 +154,7 @@ eiger_init_irq(void) for (i = 16; i < 128; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &eiger_irq_type; + irq_desc[i].chip = &eiger_irq_type; } } diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c index fcabb7c96a16..0148e095638f 100644 --- a/arch/alpha/kernel/sys_jensen.c +++ b/arch/alpha/kernel/sys_jensen.c @@ -206,11 +206,11 @@ jensen_init_irq(void) { init_i8259a_irqs(); - irq_desc[1].handler = &jensen_local_irq_type; - irq_desc[4].handler = &jensen_local_irq_type; - irq_desc[3].handler = &jensen_local_irq_type; - irq_desc[7].handler = &jensen_local_irq_type; - irq_desc[9].handler = &jensen_local_irq_type; + irq_desc[1].chip = &jensen_local_irq_type; + irq_desc[4].chip = &jensen_local_irq_type; + irq_desc[3].chip = &jensen_local_irq_type; + irq_desc[7].chip = &jensen_local_irq_type; + irq_desc[9].chip = &jensen_local_irq_type; common_init_isa_dma(); } diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c index e32fee505220..36d215954376 100644 --- a/arch/alpha/kernel/sys_marvel.c +++ b/arch/alpha/kernel/sys_marvel.c @@ -303,7 +303,7 @@ init_io7_irqs(struct io7 *io7, /* Set up the lsi irqs. */ for (i = 0; i < 128; ++i) { irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[base + i].handler = lsi_ops; + irq_desc[base + i].chip = lsi_ops; } /* Disable the implemented irqs in hardware. */ @@ -317,7 +317,7 @@ init_io7_irqs(struct io7 *io7, /* Set up the msi irqs. */ for (i = 128; i < (128 + 512); ++i) { irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[base + i].handler = msi_ops; + irq_desc[base + i].chip = msi_ops; } for (i = 0; i < 16; ++i) @@ -335,7 +335,7 @@ marvel_init_irq(void) /* Reserve the legacy irqs. */ for (i = 0; i < 16; ++i) { irq_desc[i].status = IRQ_DISABLED; - irq_desc[i].handler = &marvel_legacy_irq_type; + irq_desc[i].chip = &marvel_legacy_irq_type; } /* Init the io7 irqs. */ diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c index d78a0daa6168..b741600e3761 100644 --- a/arch/alpha/kernel/sys_mikasa.c +++ b/arch/alpha/kernel/sys_mikasa.c @@ -117,7 +117,7 @@ mikasa_init_irq(void) for (i = 16; i < 32; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &mikasa_irq_type; + irq_desc[i].chip = &mikasa_irq_type; } init_i8259a_irqs(); diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c index 65061f5d7410..55db02d318d7 100644 --- a/arch/alpha/kernel/sys_noritake.c +++ b/arch/alpha/kernel/sys_noritake.c @@ -139,7 +139,7 @@ noritake_init_irq(void) for (i = 16; i < 48; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &noritake_irq_type; + irq_desc[i].chip = &noritake_irq_type; } init_i8259a_irqs(); diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c index 05888a02a604..949607e3d6fb 100644 --- a/arch/alpha/kernel/sys_rawhide.c +++ b/arch/alpha/kernel/sys_rawhide.c @@ -180,7 +180,7 @@ rawhide_init_irq(void) for (i = 16; i < 128; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &rawhide_irq_type; + irq_desc[i].chip = &rawhide_irq_type; } init_i8259a_irqs(); diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c index 58404243057b..6ae506052635 100644 --- a/arch/alpha/kernel/sys_rx164.c +++ b/arch/alpha/kernel/sys_rx164.c @@ -117,7 +117,7 @@ rx164_init_irq(void) rx164_update_irq_hw(0); for (i = 16; i < 40; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &rx164_irq_type; + irq_desc[i].chip = &rx164_irq_type; } init_i8259a_irqs(); diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c index a7ff84474ace..24dea40c9bfe 100644 --- a/arch/alpha/kernel/sys_sable.c +++ b/arch/alpha/kernel/sys_sable.c @@ -537,7 +537,7 @@ sable_lynx_init_irq(int nr_irqs) for (i = 0; i < nr_irqs; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &sable_lynx_irq_type; + irq_desc[i].chip = &sable_lynx_irq_type; } common_init_isa_dma(); diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c index 7955bdfc2db0..2c75cd1fd81a 100644 --- a/arch/alpha/kernel/sys_takara.c +++ b/arch/alpha/kernel/sys_takara.c @@ -154,7 +154,7 @@ takara_init_irq(void) for (i = 16; i < 128; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = &takara_irq_type; + irq_desc[i].chip = &takara_irq_type; } common_init_isa_dma(); diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c index 2551fb49ae09..13f3ed8ed7ac 100644 --- a/arch/alpha/kernel/sys_titan.c +++ b/arch/alpha/kernel/sys_titan.c @@ -189,7 +189,7 @@ init_titan_irqs(struct hw_interrupt_type * ops, int imin, int imax) long i; for (i = imin; i <= imax; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].handler = ops; + irq_desc[i].chip = ops; } } diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c index 1553f470246e..22c5798fe083 100644 --- a/arch/alpha/kernel/sys_wildfire.c +++ b/arch/alpha/kernel/sys_wildfire.c @@ -199,14 +199,14 @@ wildfire_init_irq_per_pca(int qbbno, int pcano) if (i == 2) continue; irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i+irq_bias].handler = &wildfire_irq_type; + irq_desc[i+irq_bias].chip = &wildfire_irq_type; } irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[36+irq_bias].handler = &wildfire_irq_type; + irq_desc[36+irq_bias].chip = &wildfire_irq_type; for (i = 40; i < 64; ++i) { irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i+irq_bias].handler = &wildfire_irq_type; + irq_desc[i+irq_bias].chip = &wildfire_irq_type; } setup_irq(32+irq_bias, &isa_enable); diff --git a/arch/cris/arch-v10/kernel/irq.c b/arch/cris/arch-v10/kernel/irq.c index 4b368a122015..2d5be93b5197 100644 --- a/arch/cris/arch-v10/kernel/irq.c +++ b/arch/cris/arch-v10/kernel/irq.c @@ -172,7 +172,7 @@ init_IRQ(void) /* Initialize IRQ handler descriptiors. */ for(i = 2; i < NR_IRQS; i++) { - irq_desc[i].handler = &crisv10_irq_type; + irq_desc[i].chip = &crisv10_irq_type; set_int_vector(i, interrupt[i]); } diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c index c78cc2685133..06260874f018 100644 --- a/arch/cris/arch-v32/kernel/irq.c +++ b/arch/cris/arch-v32/kernel/irq.c @@ -369,7 +369,7 @@ init_IRQ(void) /* Point all IRQ's to bad handlers. */ for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) { - irq_desc[j].handler = &crisv32_irq_type; + irq_desc[j].chip = &crisv32_irq_type; set_exception_vector(i, interrupt[j]); } diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c index b504def3e346..6547bb646364 100644 --- a/arch/cris/kernel/irq.c +++ b/arch/cris/kernel/irq.c @@ -69,7 +69,7 @@ int show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #endif - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) diff --git a/arch/i386/kernel/i8259.c b/arch/i386/kernel/i8259.c index c1a42feba286..3c6063671a9f 100644 --- a/arch/i386/kernel/i8259.c +++ b/arch/i386/kernel/i8259.c @@ -132,7 +132,7 @@ void make_8259A_irq(unsigned int irq) { disable_irq_nosync(irq); io_apic_irqs &= ~(1<<irq); - irq_desc[irq].handler = &i8259A_irq_type; + irq_desc[irq].chip = &i8259A_irq_type; enable_irq(irq); } @@ -386,12 +386,12 @@ void __init init_ISA_irqs (void) /* * 16 old-style INTA-cycle interrupts: */ - irq_desc[i].handler = &i8259A_irq_type; + irq_desc[i].chip = &i8259A_irq_type; } else { /* * 'high' PCI IRQs filled in on demand */ - irq_desc[i].handler = &no_irq_type; + irq_desc[i].chip = &no_irq_type; } } } diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c index 72ae414e4d49..4a74b696c6a3 100644 --- a/arch/i386/kernel/io_apic.c +++ b/arch/i386/kernel/io_apic.c @@ -1205,15 +1205,17 @@ static struct hw_interrupt_type ioapic_edge_type; #define IOAPIC_EDGE 0 #define IOAPIC_LEVEL 1 -static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger) +static void ioapic_register_intr(int irq, int vector, unsigned long trigger) { - unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; + unsigned idx; + + idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || trigger == IOAPIC_LEVEL) - irq_desc[idx].handler = &ioapic_level_type; + irq_desc[idx].chip = &ioapic_level_type; else - irq_desc[idx].handler = &ioapic_edge_type; + irq_desc[idx].chip = &ioapic_edge_type; set_intr_gate(vector, interrupt[idx]); } @@ -1325,7 +1327,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in * The timer IRQ doesn't have to know that behind the * scene we have a 8259A-master in AEOI mode ... */ - irq_desc[0].handler = &ioapic_edge_type; + irq_desc[0].chip = &ioapic_edge_type; /* * Add it to the IO-APIC irq-routing table: @@ -2135,7 +2137,7 @@ static inline void init_IO_APIC_traps(void) make_8259A_irq(irq); else /* Strange. Oh, well.. */ - irq_desc[irq].handler = &no_irq_type; + irq_desc[irq].chip = &no_irq_type; } } } @@ -2351,7 +2353,7 @@ static inline void check_timer(void) printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); disable_8259A_irq(0); - irq_desc[0].handler = &lapic_irq_type; + irq_desc[0].chip = &lapic_irq_type; apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ enable_8259A_irq(0); diff --git a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c index 9eec9435318e..b942a5918dab 100644 --- a/arch/i386/kernel/irq.c +++ b/arch/i386/kernel/irq.c @@ -249,7 +249,7 @@ int show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #endif - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) @@ -296,8 +296,8 @@ void fixup_irqs(cpumask_t map) printk("Breaking affinity for irq %i\n", irq); mask = map; } - if (irq_desc[irq].handler->set_affinity) - irq_desc[irq].handler->set_affinity(irq, mask); + if (irq_desc[irq].chip->set_affinity) + irq_desc[irq].chip->set_affinity(irq, mask); else if (irq_desc[irq].action && !(warned++)) printk("Cannot set affinity for irq %i\n", irq); } diff --git a/arch/i386/mach-visws/visws_apic.c b/arch/i386/mach-visws/visws_apic.c index 3e64fb721291..c418521dd554 100644 --- a/arch/i386/mach-visws/visws_apic.c +++ b/arch/i386/mach-visws/visws_apic.c @@ -278,22 +278,22 @@ void init_VISWS_APIC_irqs(void) irq_desc[i].depth = 1; if (i == 0) { - irq_desc[i].handler = &cobalt_irq_type; + irq_desc[i].chip = &cobalt_irq_type; } else if (i == CO_IRQ_IDE0) { - irq_desc[i].handler = &cobalt_irq_type; + irq_desc[i].chip = &cobalt_irq_type; } else if (i == CO_IRQ_IDE1) { - irq_desc[i].handler = &cobalt_irq_type; + irq_desc[i].chip = &cobalt_irq_type; } else if (i == CO_IRQ_8259) { - irq_desc[i].handler = &piix4_master_irq_type; + irq_desc[i].chip = &piix4_master_irq_type; } else if (i < CO_IRQ_APIC0) { - irq_desc[i].handler = &piix4_virtual_irq_type; + irq_desc[i].chip = &piix4_virtual_irq_type; } else if (IS_CO_APIC(i)) { - irq_desc[i].handler = &cobalt_irq_type; + irq_desc[i].chip = &cobalt_irq_type; } } diff --git a/arch/i386/mach-voyager/voyager_smp.c b/arch/i386/mach-voyager/voyager_smp.c index 8242af9ebc6f..5b8b579a079f 100644 --- a/arch/i386/mach-voyager/voyager_smp.c +++ b/arch/i386/mach-voyager/voyager_smp.c @@ -1419,7 +1419,7 @@ smp_intr_init(void) * This is for later: first 16 correspond to PC IRQs; next 16 * are Primary MC IRQs and final 16 are Secondary MC IRQs */ for(i = 0; i < 48; i++) - irq_desc[i].handler = &vic_irq_type; + irq_desc[i].chip = &vic_irq_type; } /* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index d58c1c5c903a..abb4cb1c831e 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c @@ -660,13 +660,13 @@ register_intr (unsigned int gsi, int vector, unsigned char delivery, irq_type = &irq_type_iosapic_level; idesc = irq_descp(vector); - if (idesc->handler != irq_type) { - if (idesc->handler != &no_irq_type) + if (idesc->chip != irq_type) { + if (idesc->chip != &no_irq_type) printk(KERN_WARNING "%s: changing vector %d from %s to %s\n", __FUNCTION__, vector, - idesc->handler->typename, irq_type->typename); - idesc->handler = irq_type; + idesc->chip->typename, irq_type->typename); + idesc->chip = irq_type; } return 0; } @@ -903,7 +903,7 @@ iosapic_unregister_intr (unsigned int gsi) BUG_ON(iosapic_intr_info[vector].count); /* Clear the interrupt controller descriptor */ - idesc->handler = &no_irq_type; + idesc->chip = &no_irq_type; /* Clear the interrupt information */ memset(&iosapic_intr_info[vector], 0, diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c index 9c72ea3f6432..2645153dba8a 100644 --- a/arch/ia64/kernel/irq.c +++ b/arch/ia64/kernel/irq.c @@ -76,7 +76,7 @@ int show_interrupts(struct seq_file *p, void *v) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); } #endif - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) @@ -144,15 +144,15 @@ static void migrate_irqs(void) /* * Al three are essential, currently WARN_ON.. maybe panic? */ - if (desc->handler && desc->handler->disable && - desc->handler->enable && desc->handler->set_affinity) { - desc->handler->disable(irq); - desc->handler->set_affinity(irq, mask); - desc->handler->enable(irq); + if (desc->chip && desc->chip->disable && + desc->chip->enable && desc->chip->set_affinity) { + desc->chip->disable(irq); + desc->chip->set_affinity(irq, mask); + desc->chip->enable(irq); } else { - WARN_ON((!(desc->handler) || !(desc->handler->disable) || - !(desc->handler->enable) || - !(desc->handler->set_affinity))); + WARN_ON((!(desc->chip) || !(desc->chip->disable) || + !(desc->chip->enable) || + !(desc->chip->set_affinity))); } } } diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c index ef9a2b49307a..6d8fc9498ed9 100644 --- a/arch/ia64/kernel/irq_ia64.c +++ b/arch/ia64/kernel/irq_ia64.c @@ -251,7 +251,7 @@ register_percpu_irq (ia64_vector vec, struct irqaction *action) if (irq_to_vector(irq) == vec) { desc = irq_descp(irq); desc->status |= IRQ_PER_CPU; - desc->handler = &irq_type_ia64_lsapic; + desc->chip = &irq_type_ia64_lsapic; if (action) setup_irq(irq, action); } diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c index 44e9547878ac..d69288055599 100644 --- a/arch/ia64/kernel/smpboot.c +++ b/arch/ia64/kernel/smpboot.c @@ -684,9 +684,9 @@ int migrate_platform_irqs(unsigned int cpu) * polling before making changes. */ if (desc) { - desc->handler->disable(ia64_cpe_irq); - desc->handler->set_affinity(ia64_cpe_irq, mask); - desc->handler->enable(ia64_cpe_irq); + desc->chip->disable(ia64_cpe_irq); + desc->chip->set_affinity(ia64_cpe_irq, mask); + desc->chip->enable(ia64_cpe_irq); printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); } } diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 677c6c0fd661..7bb6ad188ba3 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c @@ -225,8 +225,8 @@ void sn_irq_init(void) ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR; for (i = 0; i < NR_IRQS; i++) { - if (base_desc[i].handler == &no_irq_type) { - base_desc[i].handler = &irq_type_sn; + if (base_desc[i].chip == &no_irq_type) { + base_desc[i].chip = &irq_type_sn; } } } diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c index a4634b06f675..3841861df6a2 100644 --- a/arch/m32r/kernel/irq.c +++ b/arch/m32r/kernel/irq.c @@ -54,7 +54,7 @@ int show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #endif - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) diff --git a/arch/m32r/kernel/setup_m32104ut.c b/arch/m32r/kernel/setup_m32104ut.c index 6328e1357a80..f9f56c270195 100644 --- a/arch/m32r/kernel/setup_m32104ut.c +++ b/arch/m32r/kernel/setup_m32104ut.c @@ -87,7 +87,7 @@ void __init init_IRQ(void) #if defined(CONFIG_SMC91X) /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/ irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT0].handler = &m32104ut_irq_type; + irq_desc[M32R_IRQ_INT0].chip = &m32104ut_irq_type; irq_desc[M32R_IRQ_INT0].action = 0; irq_desc[M32R_IRQ_INT0].depth = 1; icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */ @@ -96,7 +96,7 @@ void __init init_IRQ(void) /* MFT2 : system timer */ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_MFT2].handler = &m32104ut_irq_type; + irq_desc[M32R_IRQ_MFT2].chip = &m32104ut_irq_type; irq_desc[M32R_IRQ_MFT2].action = 0; irq_desc[M32R_IRQ_MFT2].depth = 1; icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; @@ -105,7 +105,7 @@ void __init init_IRQ(void) #ifdef CONFIG_SERIAL_M32R_SIO /* SIO0_R : uart receive data */ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_R].handler = &m32104ut_irq_type; + irq_desc[M32R_IRQ_SIO0_R].chip = &m32104ut_irq_type; irq_desc[M32R_IRQ_SIO0_R].action = 0; irq_desc[M32R_IRQ_SIO0_R].depth = 1; icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; @@ -113,7 +113,7 @@ void __init init_IRQ(void) /* SIO0_S : uart send data */ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_S].handler = &m32104ut_irq_type; + irq_desc[M32R_IRQ_SIO0_S].chip = &m32104ut_irq_type; irq_desc[M32R_IRQ_SIO0_S].action = 0; irq_desc[M32R_IRQ_SIO0_S].depth = 1; icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; diff --git a/arch/m32r/kernel/setup_m32700ut.c b/arch/m32r/kernel/setup_m32700ut.c index fad1fc99bb27..b6ab00eff580 100644 --- a/arch/m32r/kernel/setup_m32700ut.c +++ b/arch/m32r/kernel/setup_m32700ut.c @@ -301,7 +301,7 @@ void __init init_IRQ(void) #if defined(CONFIG_SMC91X) /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/ irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED; - irq_desc[M32700UT_LAN_IRQ_LAN].handler = &m32700ut_lanpld_irq_type; + irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type; irq_desc[M32700UT_LAN_IRQ_LAN].action = 0; irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */ lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ @@ -310,7 +310,7 @@ void __init init_IRQ(void) /* MFT2 : system timer */ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_MFT2].handler = &m32700ut_irq_type; + irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type; irq_desc[M32R_IRQ_MFT2].action = 0; irq_desc[M32R_IRQ_MFT2].depth = 1; icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; @@ -318,7 +318,7 @@ void __init init_IRQ(void) /* SIO0 : receive */ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_R].handler = &m32700ut_irq_type; + irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type; irq_desc[M32R_IRQ_SIO0_R].action = 0; irq_desc[M32R_IRQ_SIO0_R].depth = 1; icu_data[M32R_IRQ_SIO0_R].icucr = 0; @@ -326,7 +326,7 @@ void __init init_IRQ(void) /* SIO0 : send */ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_S].handler = &m32700ut_irq_type; + irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type; irq_desc[M32R_IRQ_SIO0_S].action = 0; irq_desc[M32R_IRQ_SIO0_S].depth = 1; icu_data[M32R_IRQ_SIO0_S].icucr = 0; @@ -334,7 +334,7 @@ void __init init_IRQ(void) /* SIO1 : receive */ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_R].handler = &m32700ut_irq_type; + irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type; irq_desc[M32R_IRQ_SIO1_R].action = 0; irq_desc[M32R_IRQ_SIO1_R].depth = 1; icu_data[M32R_IRQ_SIO1_R].icucr = 0; @@ -342,7 +342,7 @@ void __init init_IRQ(void) /* SIO1 : send */ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_S].handler = &m32700ut_irq_type; + irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type; irq_desc[M32R_IRQ_SIO1_S].action = 0; irq_desc[M32R_IRQ_SIO1_S].depth = 1; icu_data[M32R_IRQ_SIO1_S].icucr = 0; @@ -350,7 +350,7 @@ void __init init_IRQ(void) /* DMA1 : */ irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_DMA1].handler = &m32700ut_irq_type; + irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type; irq_desc[M32R_IRQ_DMA1].action = 0; irq_desc[M32R_IRQ_DMA1].depth = 1; icu_data[M32R_IRQ_DMA1].icucr = 0; @@ -359,7 +359,7 @@ void __init init_IRQ(void) #ifdef CONFIG_SERIAL_M32R_PLDSIO /* INT#1: SIO0 Receive on PLD */ irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_SIO0_RCV].handler = &m32700ut_pld_irq_type; + irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type; irq_desc[PLD_IRQ_SIO0_RCV].action = 0; irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; @@ -367,7 +367,7 @@ void __init init_IRQ(void) /* INT#1: SIO0 Send on PLD */ irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_SIO0_SND].handler = &m32700ut_pld_irq_type; + irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type; irq_desc[PLD_IRQ_SIO0_SND].action = 0; irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; @@ -376,7 +376,7 @@ void __init init_IRQ(void) /* INT#1: CFC IREQ on PLD */ irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFIREQ].handler = &m32700ut_pld_irq_type; + irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type; irq_desc[PLD_IRQ_CFIREQ].action = 0; irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ @@ -384,7 +384,7 @@ void __init init_IRQ(void) /* INT#1: CFC Insert on PLD */ irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFC_INSERT].handler = &m32700ut_pld_irq_type; + irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type; irq_desc[PLD_IRQ_CFC_INSERT].action = 0; irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ @@ -392,7 +392,7 @@ void __init init_IRQ(void) /* INT#1: CFC Eject on PLD */ irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFC_EJECT].handler = &m32700ut_pld_irq_type; + irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type; irq_desc[PLD_IRQ_CFC_EJECT].action = 0; irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ @@ -416,7 +416,7 @@ void __init init_IRQ(void) outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED; - irq_desc[M32700UT_LCD_IRQ_USB_INT1].handler = &m32700ut_lcdpld_irq_type; + irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type; irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0; irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1; lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ @@ -434,7 +434,7 @@ void __init init_IRQ(void) * INT3# is used for AR */ irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT3].handler = &m32700ut_irq_type; + irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type; irq_desc[M32R_IRQ_INT3].action = 0; irq_desc[M32R_IRQ_INT3].depth = 1; icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; diff --git a/arch/m32r/kernel/setup_mappi.c b/arch/m32r/kernel/setup_mappi.c index 00f253209cb3..c268044185f5 100644 --- a/arch/m32r/kernel/setup_mappi.c +++ b/arch/m32r/kernel/setup_mappi.c @@ -86,7 +86,7 @@ void __init init_IRQ(void) #ifdef CONFIG_NE2000 /* INT0 : LAN controller (RTL8019AS) */ irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT0].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type; irq_desc[M32R_IRQ_INT0].action = 0; irq_desc[M32R_IRQ_INT0].depth = 1; icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; @@ -95,7 +95,7 @@ void __init init_IRQ(void) /* MFT2 : system timer */ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type; irq_desc[M32R_IRQ_MFT2].action = 0; irq_desc[M32R_IRQ_MFT2].depth = 1; icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; @@ -104,7 +104,7 @@ void __init init_IRQ(void) #ifdef CONFIG_SERIAL_M32R_SIO /* SIO0_R : uart receive data */ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type; irq_desc[M32R_IRQ_SIO0_R].action = 0; irq_desc[M32R_IRQ_SIO0_R].depth = 1; icu_data[M32R_IRQ_SIO0_R].icucr = 0; @@ -112,7 +112,7 @@ void __init init_IRQ(void) /* SIO0_S : uart send data */ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type; irq_desc[M32R_IRQ_SIO0_S].action = 0; irq_desc[M32R_IRQ_SIO0_S].depth = 1; icu_data[M32R_IRQ_SIO0_S].icucr = 0; @@ -120,7 +120,7 @@ void __init init_IRQ(void) /* SIO1_R : uart receive data */ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type; irq_desc[M32R_IRQ_SIO1_R].action = 0; irq_desc[M32R_IRQ_SIO1_R].depth = 1; icu_data[M32R_IRQ_SIO1_R].icucr = 0; @@ -128,7 +128,7 @@ void __init init_IRQ(void) /* SIO1_S : uart send data */ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type; irq_desc[M32R_IRQ_SIO1_S].action = 0; irq_desc[M32R_IRQ_SIO1_S].depth = 1; icu_data[M32R_IRQ_SIO1_S].icucr = 0; @@ -138,7 +138,7 @@ void __init init_IRQ(void) #if defined(CONFIG_M32R_PCC) /* INT1 : pccard0 interrupt */ irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT1].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type; irq_desc[M32R_IRQ_INT1].action = 0; irq_desc[M32R_IRQ_INT1].depth = 1; icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; @@ -146,7 +146,7 @@ void __init init_IRQ(void) /* INT2 : pccard1 interrupt */ irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT2].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type; irq_desc[M32R_IRQ_INT2].action = 0; irq_desc[M32R_IRQ_INT2].depth = 1; icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; diff --git a/arch/m32r/kernel/setup_mappi2.c b/arch/m32r/kernel/setup_mappi2.c index eebc9d8b4e72..bd2327d5cca2 100644 --- a/arch/m32r/kernel/setup_mappi2.c +++ b/arch/m32r/kernel/setup_mappi2.c @@ -87,7 +87,7 @@ void __init init_IRQ(void) #if defined(CONFIG_SMC91X) /* INT0 : LAN controller (SMC91111) */ irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT0].handler = &mappi2_irq_type; + irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type; irq_desc[M32R_IRQ_INT0].action = 0; irq_desc[M32R_IRQ_INT0].depth = 1; icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; @@ -96,7 +96,7 @@ void __init init_IRQ(void) /* MFT2 : system timer */ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_MFT2].handler = &mappi2_irq_type; + irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type; irq_desc[M32R_IRQ_MFT2].action = 0; irq_desc[M32R_IRQ_MFT2].depth = 1; icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; @@ -105,7 +105,7 @@ void __init init_IRQ(void) #ifdef CONFIG_SERIAL_M32R_SIO /* SIO0_R : uart receive data */ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_R].handler = &mappi2_irq_type; + irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type; irq_desc[M32R_IRQ_SIO0_R].action = 0; irq_desc[M32R_IRQ_SIO0_R].depth = 1; icu_data[M32R_IRQ_SIO0_R].icucr = 0; @@ -113,14 +113,14 @@ void __init init_IRQ(void) /* SIO0_S : uart send data */ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_S].handler = &mappi2_irq_type; + irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type; irq_desc[M32R_IRQ_SIO0_S].action = 0; irq_desc[M32R_IRQ_SIO0_S].depth = 1; icu_data[M32R_IRQ_SIO0_S].icucr = 0; disable_mappi2_irq(M32R_IRQ_SIO0_S); /* SIO1_R : uart receive data */ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_R].handler = &mappi2_irq_type; + irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type; irq_desc[M32R_IRQ_SIO1_R].action = 0; irq_desc[M32R_IRQ_SIO1_R].depth = 1; icu_data[M32R_IRQ_SIO1_R].icucr = 0; @@ -128,7 +128,7 @@ void __init init_IRQ(void) /* SIO1_S : uart send data */ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_S].handler = &mappi2_irq_type; + irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type; irq_desc[M32R_IRQ_SIO1_S].action = 0; irq_desc[M32R_IRQ_SIO1_S].depth = 1; icu_data[M32R_IRQ_SIO1_S].icucr = 0; @@ -138,7 +138,7 @@ void __init init_IRQ(void) #if defined(CONFIG_USB) /* INT1 : USB Host controller interrupt */ irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT1].handler = &mappi2_irq_type; + irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type; irq_desc[M32R_IRQ_INT1].action = 0; irq_desc[M32R_IRQ_INT1].depth = 1; icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; @@ -147,7 +147,7 @@ void __init init_IRQ(void) /* ICUCR40: CFC IREQ */ irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFIREQ].handler = &mappi2_irq_type; + irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type; irq_desc[PLD_IRQ_CFIREQ].action = 0; irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; @@ -156,7 +156,7 @@ void __init init_IRQ(void) #if defined(CONFIG_M32R_CFC) /* ICUCR41: CFC Insert */ irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi2_irq_type; + irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type; irq_desc[PLD_IRQ_CFC_INSERT].action = 0; irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; @@ -164,7 +164,7 @@ void __init init_IRQ(void) /* ICUCR42: CFC Eject */ irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi2_irq_type; + irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type; irq_desc[PLD_IRQ_CFC_EJECT].action = 0; irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; diff --git a/arch/m32r/kernel/setup_mappi3.c b/arch/m32r/kernel/setup_mappi3.c index d2ff021e2d3d..014b51d17505 100644 --- a/arch/m32r/kernel/setup_mappi3.c +++ b/arch/m32r/kernel/setup_mappi3.c @@ -87,7 +87,7 @@ void __init init_IRQ(void) #if defined(CONFIG_SMC91X) /* INT0 : LAN controller (SMC91111) */ irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT0].handler = &mappi3_irq_type; + irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type; irq_desc[M32R_IRQ_INT0].action = 0; irq_desc[M32R_IRQ_INT0].depth = 1; icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; @@ -96,7 +96,7 @@ void __init init_IRQ(void) /* MFT2 : system timer */ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_MFT2].handler = &mappi3_irq_type; + irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type; irq_desc[M32R_IRQ_MFT2].action = 0; irq_desc[M32R_IRQ_MFT2].depth = 1; icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; @@ -105,7 +105,7 @@ void __init init_IRQ(void) #ifdef CONFIG_SERIAL_M32R_SIO /* SIO0_R : uart receive data */ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_R].handler = &mappi3_irq_type; + irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type; irq_desc[M32R_IRQ_SIO0_R].action = 0; irq_desc[M32R_IRQ_SIO0_R].depth = 1; icu_data[M32R_IRQ_SIO0_R].icucr = 0; @@ -113,14 +113,14 @@ void __init init_IRQ(void) /* SIO0_S : uart send data */ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_S].handler = &mappi3_irq_type; + irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type; irq_desc[M32R_IRQ_SIO0_S].action = 0; irq_desc[M32R_IRQ_SIO0_S].depth = 1; icu_data[M32R_IRQ_SIO0_S].icucr = 0; disable_mappi3_irq(M32R_IRQ_SIO0_S); /* SIO1_R : uart receive data */ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_R].handler = &mappi3_irq_type; + irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type; irq_desc[M32R_IRQ_SIO1_R].action = 0; irq_desc[M32R_IRQ_SIO1_R].depth = 1; icu_data[M32R_IRQ_SIO1_R].icucr = 0; @@ -128,7 +128,7 @@ void __init init_IRQ(void) /* SIO1_S : uart send data */ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_S].handler = &mappi3_irq_type; + irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type; irq_desc[M32R_IRQ_SIO1_S].action = 0; irq_desc[M32R_IRQ_SIO1_S].depth = 1; icu_data[M32R_IRQ_SIO1_S].icucr = 0; @@ -138,7 +138,7 @@ void __init init_IRQ(void) #if defined(CONFIG_USB) /* INT1 : USB Host controller interrupt */ irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT1].handler = &mappi3_irq_type; + irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type; irq_desc[M32R_IRQ_INT1].action = 0; irq_desc[M32R_IRQ_INT1].depth = 1; icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; @@ -147,7 +147,7 @@ void __init init_IRQ(void) /* CFC IREQ */ irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type; + irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type; irq_desc[PLD_IRQ_CFIREQ].action = 0; irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; @@ -156,7 +156,7 @@ void __init init_IRQ(void) #if defined(CONFIG_M32R_CFC) /* ICUCR41: CFC Insert & eject */ irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type; + irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type; irq_desc[PLD_IRQ_CFC_INSERT].action = 0; irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; @@ -166,7 +166,7 @@ void __init init_IRQ(void) /* IDE IREQ */ irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_IDEIREQ].handler = &mappi3_irq_type; + irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type; irq_desc[PLD_IRQ_IDEIREQ].action = 0; irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */ icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; diff --git a/arch/m32r/kernel/setup_oaks32r.c b/arch/m32r/kernel/setup_oaks32r.c index 0e9e63538c0f..ea64831aef7a 100644 --- a/arch/m32r/kernel/setup_oaks32r.c +++ b/arch/m32r/kernel/setup_oaks32r.c @@ -85,7 +85,7 @@ void __init init_IRQ(void) #ifdef CONFIG_NE2000 /* INT3 : LAN controller (RTL8019AS) */ irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT3].handler = &oaks32r_irq_type; + irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type; irq_desc[M32R_IRQ_INT3].action = 0; irq_desc[M32R_IRQ_INT3].depth = 1; icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; @@ -94,7 +94,7 @@ void __init init_IRQ(void) /* MFT2 : system timer */ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_MFT2].handler = &oaks32r_irq_type; + irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type; irq_desc[M32R_IRQ_MFT2].action = 0; irq_desc[M32R_IRQ_MFT2].depth = 1; icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; @@ -103,7 +103,7 @@ void __init init_IRQ(void) #ifdef CONFIG_SERIAL_M32R_SIO /* SIO0_R : uart receive data */ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_R].handler = &oaks32r_irq_type; + irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type; irq_desc[M32R_IRQ_SIO0_R].action = 0; irq_desc[M32R_IRQ_SIO0_R].depth = 1; icu_data[M32R_IRQ_SIO0_R].icucr = 0; @@ -111,7 +111,7 @@ void __init init_IRQ(void) /* SIO0_S : uart send data */ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_S].handler = &oaks32r_irq_type; + irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type; irq_desc[M32R_IRQ_SIO0_S].action = 0; irq_desc[M32R_IRQ_SIO0_S].depth = 1; icu_data[M32R_IRQ_SIO0_S].icucr = 0; @@ -119,7 +119,7 @@ void __init init_IRQ(void) /* SIO1_R : uart receive data */ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_R].handler = &oaks32r_irq_type; + irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type; irq_desc[M32R_IRQ_SIO1_R].action = 0; irq_desc[M32R_IRQ_SIO1_R].depth = 1; icu_data[M32R_IRQ_SIO1_R].icucr = 0; @@ -127,7 +127,7 @@ void __init init_IRQ(void) /* SIO1_S : uart send data */ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_S].handler = &oaks32r_irq_type; + irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type; irq_desc[M32R_IRQ_SIO1_S].action = 0; irq_desc[M32R_IRQ_SIO1_S].depth = 1; icu_data[M32R_IRQ_SIO1_S].icucr = 0; diff --git a/arch/m32r/kernel/setup_opsput.c b/arch/m32r/kernel/setup_opsput.c index 548e8fc7949b..55e8972d455a 100644 --- a/arch/m32r/kernel/setup_opsput.c +++ b/arch/m32r/kernel/setup_opsput.c @@ -302,7 +302,7 @@ void __init init_IRQ(void) #if defined(CONFIG_SMC91X) /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/ irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED; - irq_desc[OPSPUT_LAN_IRQ_LAN].handler = &opsput_lanpld_irq_type; + irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type; irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0; irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */ lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ @@ -311,7 +311,7 @@ void __init init_IRQ(void) /* MFT2 : system timer */ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_MFT2].handler = &opsput_irq_type; + irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type; irq_desc[M32R_IRQ_MFT2].action = 0; irq_desc[M32R_IRQ_MFT2].depth = 1; icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; @@ -319,7 +319,7 @@ void __init init_IRQ(void) /* SIO0 : receive */ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_R].handler = &opsput_irq_type; + irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type; irq_desc[M32R_IRQ_SIO0_R].action = 0; irq_desc[M32R_IRQ_SIO0_R].depth = 1; icu_data[M32R_IRQ_SIO0_R].icucr = 0; @@ -327,7 +327,7 @@ void __init init_IRQ(void) /* SIO0 : send */ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_S].handler = &opsput_irq_type; + irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type; irq_desc[M32R_IRQ_SIO0_S].action = 0; irq_desc[M32R_IRQ_SIO0_S].depth = 1; icu_data[M32R_IRQ_SIO0_S].icucr = 0; @@ -335,7 +335,7 @@ void __init init_IRQ(void) /* SIO1 : receive */ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_R].handler = &opsput_irq_type; + irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type; irq_desc[M32R_IRQ_SIO1_R].action = 0; irq_desc[M32R_IRQ_SIO1_R].depth = 1; icu_data[M32R_IRQ_SIO1_R].icucr = 0; @@ -343,7 +343,7 @@ void __init init_IRQ(void) /* SIO1 : send */ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_S].handler = &opsput_irq_type; + irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type; irq_desc[M32R_IRQ_SIO1_S].action = 0; irq_desc[M32R_IRQ_SIO1_S].depth = 1; icu_data[M32R_IRQ_SIO1_S].icucr = 0; @@ -351,7 +351,7 @@ void __init init_IRQ(void) /* DMA1 : */ irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_DMA1].handler = &opsput_irq_type; + irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type; irq_desc[M32R_IRQ_DMA1].action = 0; irq_desc[M32R_IRQ_DMA1].depth = 1; icu_data[M32R_IRQ_DMA1].icucr = 0; @@ -360,7 +360,7 @@ void __init init_IRQ(void) #ifdef CONFIG_SERIAL_M32R_PLDSIO /* INT#1: SIO0 Receive on PLD */ irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_SIO0_RCV].handler = &opsput_pld_irq_type; + irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type; irq_desc[PLD_IRQ_SIO0_RCV].action = 0; irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; @@ -368,7 +368,7 @@ void __init init_IRQ(void) /* INT#1: SIO0 Send on PLD */ irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_SIO0_SND].handler = &opsput_pld_irq_type; + irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type; irq_desc[PLD_IRQ_SIO0_SND].action = 0; irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; @@ -378,7 +378,7 @@ void __init init_IRQ(void) #if defined(CONFIG_M32R_CFC) /* INT#1: CFC IREQ on PLD */ irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFIREQ].handler = &opsput_pld_irq_type; + irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type; irq_desc[PLD_IRQ_CFIREQ].action = 0; irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ @@ -386,7 +386,7 @@ void __init init_IRQ(void) /* INT#1: CFC Insert on PLD */ irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFC_INSERT].handler = &opsput_pld_irq_type; + irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type; irq_desc[PLD_IRQ_CFC_INSERT].action = 0; irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ @@ -394,7 +394,7 @@ void __init init_IRQ(void) /* INT#1: CFC Eject on PLD */ irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CFC_EJECT].handler = &opsput_pld_irq_type; + irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type; irq_desc[PLD_IRQ_CFC_EJECT].action = 0; irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ @@ -420,7 +420,7 @@ void __init init_IRQ(void) outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED; - irq_desc[OPSPUT_LCD_IRQ_USB_INT1].handler = &opsput_lcdpld_irq_type; + irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type; irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0; irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1; lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ @@ -438,7 +438,7 @@ void __init init_IRQ(void) * INT3# is used for AR */ irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_INT3].handler = &opsput_irq_type; + irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type; irq_desc[M32R_IRQ_INT3].action = 0; irq_desc[M32R_IRQ_INT3].depth = 1; icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; diff --git a/arch/m32r/kernel/setup_usrv.c b/arch/m32r/kernel/setup_usrv.c index 64be659a23e7..7fa12d8f66b4 100644 --- a/arch/m32r/kernel/setup_usrv.c +++ b/arch/m32r/kernel/setup_usrv.c @@ -158,7 +158,7 @@ void __init init_IRQ(void) /* MFT2 : system timer */ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type; irq_desc[M32R_IRQ_MFT2].action = 0; irq_desc[M32R_IRQ_MFT2].depth = 1; icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; @@ -167,7 +167,7 @@ void __init init_IRQ(void) #if defined(CONFIG_SERIAL_M32R_SIO) /* SIO0_R : uart receive data */ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type; irq_desc[M32R_IRQ_SIO0_R].action = 0; irq_desc[M32R_IRQ_SIO0_R].depth = 1; icu_data[M32R_IRQ_SIO0_R].icucr = 0; @@ -175,7 +175,7 @@ void __init init_IRQ(void) /* SIO0_S : uart send data */ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type; irq_desc[M32R_IRQ_SIO0_S].action = 0; irq_desc[M32R_IRQ_SIO0_S].depth = 1; icu_data[M32R_IRQ_SIO0_S].icucr = 0; @@ -183,7 +183,7 @@ void __init init_IRQ(void) /* SIO1_R : uart receive data */ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type; irq_desc[M32R_IRQ_SIO1_R].action = 0; irq_desc[M32R_IRQ_SIO1_R].depth = 1; icu_data[M32R_IRQ_SIO1_R].icucr = 0; @@ -191,7 +191,7 @@ void __init init_IRQ(void) /* SIO1_S : uart send data */ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; - irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type; + irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type; irq_desc[M32R_IRQ_SIO1_S].action = 0; irq_desc[M32R_IRQ_SIO1_S].depth = 1; icu_data[M32R_IRQ_SIO1_S].icucr = 0; @@ -201,7 +201,7 @@ void __init init_IRQ(void) /* INT#67-#71: CFC#0 IREQ on PLD */ for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) { irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_CF0 + i].handler = &m32700ut_pld_irq_type; + irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type; irq_desc[PLD_IRQ_CF0 + i].action = 0; irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr @@ -212,7 +212,7 @@ void __init init_IRQ(void) #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) /* INT#76: 16552D#0 IREQ on PLD */ irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_UART0].handler = &m32700ut_pld_irq_type; + irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type; irq_desc[PLD_IRQ_UART0].action = 0; irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr @@ -221,7 +221,7 @@ void __init init_IRQ(void) /* INT#77: 16552D#1 IREQ on PLD */ irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_UART1].handler = &m32700ut_pld_irq_type; + irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type; irq_desc[PLD_IRQ_UART1].action = 0; irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr @@ -232,7 +232,7 @@ void __init init_IRQ(void) #if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE) /* INT#80: AK4524 IREQ on PLD */ irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED; - irq_desc[PLD_IRQ_SNDINT].handler = &m32700ut_pld_irq_type; + irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type; irq_desc[PLD_IRQ_SNDINT].action = 0; irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */ pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index afe05ec12c27..da74ac21954b 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c @@ -333,31 +333,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req) au_writel(1<<(irq_nr-32), IC1_CFG2CLR); au_writel(1<<(irq_nr-32), IC1_CFG1CLR); au_writel(1<<(irq_nr-32), IC1_CFG0SET); - irq_desc[irq_nr].handler = &rise_edge_irq_type; + irq_desc[irq_nr].chip = &rise_edge_irq_type; break; case INTC_INT_FALL_EDGE: /* 0:1:0 */ au_writel(1<<(irq_nr-32), IC1_CFG2CLR); au_writel(1<<(irq_nr-32), IC1_CFG1SET); au_writel(1<<(irq_nr-32), IC1_CFG0CLR); - irq_desc[irq_nr].handler = &fall_edge_irq_type; + irq_desc[irq_nr].chip = &fall_edge_irq_type; break; case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ au_writel(1<<(irq_nr-32), IC1_CFG2CLR); au_writel(1<<(irq_nr-32), IC1_CFG1SET); au_writel(1<<(irq_nr-32), IC1_CFG0SET); - irq_desc[irq_nr].handler = &either_edge_irq_type; + irq_desc[irq_nr].chip = &either_edge_irq_type; break; case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ au_writel(1<<(irq_nr-32), IC1_CFG2SET); au_writel(1<<(irq_nr-32), IC1_CFG1CLR); au_writel(1<<(irq_nr-32), IC1_CFG0SET); - irq_desc[irq_nr].handler = &level_irq_type; + irq_desc[irq_nr].chip = &level_irq_type; break; case INTC_INT_LOW_LEVEL: /* 1:1:0 */ au_writel(1<<(irq_nr-32), IC1_CFG2SET); au_writel(1<<(irq_nr-32), IC1_CFG1SET); au_writel(1<<(irq_nr-32), IC1_CFG0CLR); - irq_desc[irq_nr].handler = &level_irq_type; + irq_desc[irq_nr].chip = &level_irq_type; break; case INTC_INT_DISABLED: /* 0:0:0 */ au_writel(1<<(irq_nr-32), IC1_CFG0CLR); @@ -385,31 +385,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req) au_writel(1<<irq_nr, IC0_CFG2CLR); au_writel(1<<irq_nr, IC0_CFG1CLR); au_writel(1<<irq_nr, IC0_CFG0SET); - irq_desc[irq_nr].handler = &rise_edge_irq_type; + irq_desc[irq_nr].chip = &rise_edge_irq_type; break; case INTC_INT_FALL_EDGE: /* 0:1:0 */ au_writel(1<<irq_nr, IC0_CFG2CLR); au_writel(1<<irq_nr, IC0_CFG1SET); au_writel(1<<irq_nr, IC0_CFG0CLR); - irq_desc[irq_nr].handler = &fall_edge_irq_type; + irq_desc[irq_nr].chip = &fall_edge_irq_type; break; case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ au_writel(1<<irq_nr, IC0_CFG2CLR); au_writel(1<<irq_nr, IC0_CFG1SET); au_writel(1<<irq_nr, IC0_CFG0SET); - irq_desc[irq_nr].handler = &either_edge_irq_type; + irq_desc[irq_nr].chip = &either_edge_irq_type; break; case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ au_writel(1<<irq_nr, IC0_CFG2SET); au_writel(1<<irq_nr, IC0_CFG1CLR); au_writel(1<<irq_nr, IC0_CFG0SET); - irq_desc[irq_nr].handler = &level_irq_type; + irq_desc[irq_nr].chip = &level_irq_type; break; case INTC_INT_LOW_LEVEL: /* 1:1:0 */ au_writel(1<<irq_nr, IC0_CFG2SET); au_writel(1<<irq_nr, IC0_CFG1SET); au_writel(1<<irq_nr, IC0_CFG0CLR); - irq_desc[irq_nr].handler = &level_irq_type; + irq_desc[irq_nr].chip = &level_irq_type; break; case INTC_INT_DISABLED: /* 0:0:0 */ au_writel(1<<irq_nr, IC0_CFG0CLR); diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c index bacc0c6bfe67..5dd164fc1889 100644 --- a/arch/mips/au1000/pb1200/irqmap.c +++ b/arch/mips/au1000/pb1200/irqmap.c @@ -172,7 +172,7 @@ void _board_init_irq(void) for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++) { - irq_desc[irq_nr].handler = &external_irq_type; + irq_desc[irq_nr].chip = &external_irq_type; pb1200_disable_irq(irq_nr); } diff --git a/arch/mips/ddb5xxx/ddb5477/irq_5477.c b/arch/mips/ddb5xxx/ddb5477/irq_5477.c index 5fcd5f070cdc..63c3d6534b3a 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq_5477.c +++ b/arch/mips/ddb5xxx/ddb5477/irq_5477.c @@ -107,7 +107,7 @@ void __init vrc5477_irq_init(u32 irq_base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &vrc5477_irq_controller; + irq_desc[i].chip = &vrc5477_irq_controller; } vrc5477_irq_base = irq_base; diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index d5bca5d233b6..da2dbb42f913 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c @@ -144,13 +144,13 @@ void __init init_ioasic_irqs(int base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &ioasic_irq_type; + irq_desc[i].chip = &ioasic_irq_type; } for (; i < base + IO_IRQ_LINES; i++) { irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &ioasic_dma_irq_type; + irq_desc[i].chip = &ioasic_dma_irq_type; } ioasic_irq_base = base; diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index 898bed502a34..d44c00d9e80f 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c @@ -123,7 +123,7 @@ void __init init_kn02_irqs(int base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &kn02_irq_type; + irq_desc[i].chip = &kn02_irq_type; } kn02_irq_base = base; diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c index 46c468b26b30..f489a8067a93 100644 --- a/arch/mips/gt64120/ev64120/irq.c +++ b/arch/mips/gt64120/ev64120/irq.c @@ -138,7 +138,7 @@ void __init arch_init_irq(void) /* Let's initialize our IRQ descriptors */ for (i = 0; i < NR_IRQS; i++) { irq_desc[i].status = 0; - irq_desc[i].handler = &no_irq_type; + irq_desc[i].chip = &no_irq_type; irq_desc[i].action = NULL; irq_desc[i].depth = 0; spin_lock_init(&irq_desc[i].lock); diff --git a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c index 77be7216bdd0..a6749c56fe38 100644 --- a/arch/mips/ite-boards/generic/irq.c +++ b/arch/mips/ite-boards/generic/irq.c @@ -208,10 +208,10 @@ void __init arch_init_irq(void) #endif for (i = 0; i <= IT8172_LAST_IRQ; i++) { - irq_desc[i].handler = &it8172_irq_type; + irq_desc[i].chip = &it8172_irq_type; spin_lock_init(&irq_desc[i].lock); } - irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type; + irq_desc[MIPS_CPU_TIMER_IRQ].chip = &cp0_irq_type; set_c0_status(ALLINTS_NOTIMER); } diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index becc9accd495..478be9858a1e 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c @@ -73,7 +73,7 @@ void __init init_r4030_ints(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &r4030_irq_type; + irq_desc[i].chip = &r4030_irq_type; } r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c index 11304d1354f4..380046ea1db5 100644 --- a/arch/mips/jmr3927/rbhma3100/irq.c +++ b/arch/mips/jmr3927/rbhma3100/irq.c @@ -435,7 +435,7 @@ void jmr3927_irq_init(u32 irq_base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &jmr3927_irq_controller; + irq_desc[i].chip = &jmr3927_irq_controller; } jmr3927_irq_base = irq_base; diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index 0cb8ed5662f3..91ffb1233cad 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c @@ -120,7 +120,7 @@ int i8259A_irq_pending(unsigned int irq) void make_8259A_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &i8259A_irq_type; + irq_desc[irq].chip = &i8259A_irq_type; enable_irq(irq); } @@ -327,7 +327,7 @@ void __init init_i8259_irqs (void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &i8259A_irq_type; + irq_desc[i].chip = &i8259A_irq_type; } setup_irq(2, &irq2); diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 97ebdc754b9e..f8cd1ac64d88 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -174,14 +174,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) switch (imp->im_type) { case MSC01_IRQ_EDGE: - irq_desc[base+n].handler = &msc_edgeirq_type; + irq_desc[base+n].chip = &msc_edgeirq_type; if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); else MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); break; case MSC01_IRQ_LEVEL: - irq_desc[base+n].handler = &msc_levelirq_type; + irq_desc[base+n].chip = &msc_levelirq_type; if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); else diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c index 0613f1f36b1b..f9c763a65547 100644 --- a/arch/mips/kernel/irq-mv6434x.c +++ b/arch/mips/kernel/irq-mv6434x.c @@ -155,7 +155,7 @@ void __init mv64340_irq_init(unsigned int base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 2; - irq_desc[i].handler = &mv64340_irq_type; + irq_desc[i].chip = &mv64340_irq_type; } irq_base = base; diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index 0b130c5ac5d9..121da385a94d 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c @@ -91,7 +91,7 @@ void __init rm7k_cpu_irq_init(int base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &rm7k_irq_controller; + irq_desc[i].chip = &rm7k_irq_controller; } irq_base = base; diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index 9b5f20c32acb..25109c103e44 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c @@ -139,11 +139,11 @@ void __init rm9k_cpu_irq_init(int base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &rm9k_irq_controller; + irq_desc[i].chip = &rm9k_irq_controller; } rm9000_perfcount_irq = base + 1; - irq_desc[rm9000_perfcount_irq].handler = &rm9k_perfcounter_irq; + irq_desc[rm9000_perfcount_irq].chip = &rm9k_perfcounter_irq; irq_base = base; } diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 3dce742e716f..5c9dcd5eed59 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -95,7 +95,7 @@ int show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #endif - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) @@ -137,7 +137,7 @@ void __init init_IRQ(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &no_irq_type; + irq_desc[i].chip = &no_irq_type; spin_lock_init(&irq_desc[i].lock); #ifdef CONFIG_MIPS_MT_SMTC irq_hwmask[i] = 0; diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index 5db67e31ec1a..0e455a8ad860 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c @@ -167,14 +167,14 @@ void __init mips_cpu_irq_init(int irq_base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &mips_mt_cpu_irq_controller; + irq_desc[i].chip = &mips_mt_cpu_irq_controller; } for (i = irq_base + 2; i < irq_base + 8; i++) { irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &mips_cpu_irq_controller; + irq_desc[i].chip = &mips_cpu_irq_controller; } mips_cpu_irq_base = irq_base; diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c index 2d3472b21ebb..9316a024a818 100644 --- a/arch/mips/lasat/interrupt.c +++ b/arch/mips/lasat/interrupt.c @@ -156,6 +156,6 @@ void __init arch_init_irq(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &lasat_irq_type; + irq_desc[i].chip = &lasat_irq_type; } } diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c index db53950b7cfb..9dd6b8925581 100644 --- a/arch/mips/mips-boards/atlas/atlas_int.c +++ b/arch/mips/mips-boards/atlas/atlas_int.c @@ -215,7 +215,7 @@ void __init arch_init_irq(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &atlas_irq_type; + irq_desc[i].chip = &atlas_irq_type; spin_lock_init(&irq_desc[i].lock); } } diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c index bd885785e2f9..31d179c4673f 100644 --- a/arch/mips/momentum/ocelot_c/cpci-irq.c +++ b/arch/mips/momentum/ocelot_c/cpci-irq.c @@ -147,6 +147,6 @@ void cpci_irq_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 2; - irq_desc[i].handler = &cpci_irq_type; + irq_desc[i].chip = &cpci_irq_type; } } diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c index 755bde5146be..852265026fd1 100644 --- a/arch/mips/momentum/ocelot_c/uart-irq.c +++ b/arch/mips/momentum/ocelot_c/uart-irq.c @@ -137,10 +137,10 @@ void uart_irq_init(void) irq_desc[80].status = IRQ_DISABLED; irq_desc[80].action = 0; irq_desc[80].depth = 2; - irq_desc[80].handler = &uart_irq_type; + irq_desc[80].chip = &uart_irq_type; irq_desc[81].status = IRQ_DISABLED; irq_desc[81].action = 0; irq_desc[81].depth = 2; - irq_desc[81].handler = &uart_irq_type; + irq_desc[81].chip = &uart_irq_type; } diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c index 39ee6314f627..8f18764a2359 100644 --- a/arch/mips/philips/pnx8550/common/int.c +++ b/arch/mips/philips/pnx8550/common/int.c @@ -236,7 +236,7 @@ void __init arch_init_irq(void) int configPR; for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { - irq_desc[i].handler = &level_irq_type; + irq_desc[i].chip = &level_irq_type; pnx8550_ack(i); /* mask the irq just in case */ } @@ -273,7 +273,7 @@ void __init arch_init_irq(void) /* mask/priority is still 0 so we will not get any * interrupts until it is unmasked */ - irq_desc[i].handler = &level_irq_type; + irq_desc[i].chip = &level_irq_type; } /* Priority level 0 */ @@ -282,12 +282,12 @@ void __init arch_init_irq(void) /* Set int vector table address */ PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0; - irq_desc[MIPS_CPU_GIC_IRQ].handler = &level_irq_type; + irq_desc[MIPS_CPU_GIC_IRQ].chip = &level_irq_type; setup_irq(MIPS_CPU_GIC_IRQ, &gic_action); /* init of Timer interrupts */ for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) { - irq_desc[i].handler = &level_irq_type; + irq_desc[i].chip = &level_irq_type; } /* Stop Timer 1-3 */ @@ -295,7 +295,7 @@ void __init arch_init_irq(void) configPR |= 0x00000038; write_c0_config7(configPR); - irq_desc[MIPS_CPU_TIMER_IRQ].handler = &level_irq_type; + irq_desc[MIPS_CPU_TIMER_IRQ].chip = &level_irq_type; setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action); } diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c index b19820110aa3..989167b49ce9 100644 --- a/arch/mips/sgi-ip22/ip22-eisa.c +++ b/arch/mips/sgi-ip22/ip22-eisa.c @@ -279,9 +279,9 @@ int __init ip22_eisa_init(void) irq_desc[i].action = 0; irq_desc[i].depth = 1; if (i < (SGINT_EISA + 8)) - irq_desc[i].handler = &ip22_eisa1_irq_type; + irq_desc[i].chip = &ip22_eisa1_irq_type; else - irq_desc[i].handler = &ip22_eisa2_irq_type; + irq_desc[i].chip = &ip22_eisa2_irq_type; } /* Cannot use request_irq because of kmalloc not being ready at such diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index fc6a7e2b189c..18906af69691 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c @@ -436,7 +436,7 @@ void __init arch_init_irq(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = handler; + irq_desc[i].chip = handler; } /* vector handler. this register the IRQ as non-sharable */ diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index 0b61a39ce2bb..869566c360ae 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c @@ -386,7 +386,7 @@ void __devinit register_bridge_irq(unsigned int irq) irq_desc[irq].status = IRQ_DISABLED; irq_desc[irq].action = 0; irq_desc[irq].depth = 1; - irq_desc[irq].handler = &bridge_irq_type; + irq_desc[irq].chip = &bridge_irq_type; } int __devinit request_bridge_irq(struct bridge_controller *bc) diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index 8ba08047d164..00b94aaf6371 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -591,7 +591,7 @@ void __init arch_init_irq(void) irq_desc[irq].status = IRQ_DISABLED; irq_desc[irq].action = 0; irq_desc[irq].depth = 0; - irq_desc[irq].handler = controller; + irq_desc[irq].chip = controller; } setup_irq(CRIME_MEMERR_IRQ, &memerr_irq); setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq); diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index e61760b14d99..610df40cb820 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -276,10 +276,10 @@ void __init init_bcm1480_irqs(void) irq_desc[i].action = 0; irq_desc[i].depth = 1; if (i < BCM1480_NR_IRQS) { - irq_desc[i].handler = &bcm1480_irq_type; + irq_desc[i].chip = &bcm1480_irq_type; bcm1480_irq_owner[i] = 0; } else { - irq_desc[i].handler = &no_irq_type; + irq_desc[i].chip = &no_irq_type; } } } diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index f853c32f60a0..fcc61940f1ff 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -246,10 +246,10 @@ void __init init_sb1250_irqs(void) irq_desc[i].action = 0; irq_desc[i].depth = 1; if (i < SB1250_NR_IRQS) { - irq_desc[i].handler = &sb1250_irq_type; + irq_desc[i].chip = &sb1250_irq_type; sb1250_irq_owner[i] = 0; } else { - irq_desc[i].handler = &no_irq_type; + irq_desc[i].chip = &no_irq_type; } } } diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c index 7365b4853ddb..c19e158ec402 100644 --- a/arch/mips/sni/irq.c +++ b/arch/mips/sni/irq.c @@ -203,7 +203,7 @@ void __init arch_init_irq(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &pciasic_irq_type; + irq_desc[i].chip = &pciasic_irq_type; } change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4); diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c index 8ca68015cf40..a42be00483e6 100644 --- a/arch/mips/tx4927/common/tx4927_irq.c +++ b/arch/mips/tx4927/common/tx4927_irq.c @@ -227,7 +227,7 @@ static void __init tx4927_irq_cp0_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &tx4927_irq_cp0_type; + irq_desc[i].chip = &tx4927_irq_cp0_type; } return; @@ -435,7 +435,7 @@ static void __init tx4927_irq_pic_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 2; - irq_desc[i].handler = &tx4927_irq_pic_type; + irq_desc[i].chip = &tx4927_irq_pic_type; } setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index aee07ff2212a..c67978b6dae4 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c @@ -368,7 +368,7 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 3; - irq_desc[i].handler = &toshiba_rbtx4927_irq_ioc_type; + irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type; } setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, @@ -526,7 +526,7 @@ static void __init toshiba_rbtx4927_irq_isa_init(void) irq_desc[i].action = 0; irq_desc[i].depth = ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5)); - irq_desc[i].handler = &toshiba_rbtx4927_irq_isa_type; + irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type; } setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, @@ -692,13 +692,13 @@ void toshiba_rbtx4927_irq_dump(char *key) { u32 i, j = 0; for (i = 0; i < NR_IRQS; i++) { - if (strcmp(irq_desc[i].handler->typename, "none") + if (strcmp(irq_desc[i].chip->typename, "none") == 0) continue; if ((i >= 1) - && (irq_desc[i - 1].handler->typename == - irq_desc[i].handler->typename)) { + && (irq_desc[i - 1].chip->typename == + irq_desc[i].chip->typename)) { j++; } else { j = 0; @@ -707,12 +707,12 @@ void toshiba_rbtx4927_irq_dump(char *key) (TOSHIBA_RBTX4927_IRQ_INFO, "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n", key, i, i, irq_desc[i].status, - (u32) irq_desc[i].handler, + (u32) irq_desc[i].chip, (u32) irq_desc[i].action, (u32) (irq_desc[i].action ? irq_desc[i]. action->handler : 0), irq_desc[i].depth, - irq_desc[i].handler->typename, j); + irq_desc[i].chip->typename, j); } } #endif diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c index 873805178d8e..0b2f8c849218 100644 --- a/arch/mips/tx4938/common/irq.c +++ b/arch/mips/tx4938/common/irq.c @@ -102,7 +102,7 @@ tx4938_irq_cp0_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &tx4938_irq_cp0_type; + irq_desc[i].chip = &tx4938_irq_cp0_type; } return; @@ -306,7 +306,7 @@ tx4938_irq_pic_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 2; - irq_desc[i].handler = &tx4938_irq_pic_type; + irq_desc[i].chip = &tx4938_irq_pic_type; } setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action); diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c index 9cd9c0fe2265..3b8245dc5bd3 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c @@ -146,7 +146,7 @@ toshiba_rbtx4938_irq_ioc_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 3; - irq_desc[i].handler = &toshiba_rbtx4938_irq_ioc_type; + irq_desc[i].chip = &toshiba_rbtx4938_irq_ioc_type; } setup_irq(RBTX4938_IRQ_IOCINT, diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index 07ae19cf0c29..b9323302cc4e 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c @@ -722,10 +722,10 @@ static int __init vr41xx_icu_init(void) icu2_write(MGIUINTHREG, 0xffff); for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) - irq_desc[i].handler = &sysint1_irq_type; + irq_desc[i].chip = &sysint1_irq_type; for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) - irq_desc[i].handler = &sysint2_irq_type; + irq_desc[i].chip = &sysint2_irq_type; cascade_irq(INT0_IRQ, icu_get_irq); cascade_irq(INT1_IRQ, icu_get_irq); diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 86796bb63c3c..66aa50802deb 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c @@ -73,13 +73,13 @@ static void irq_dispatch(unsigned int irq, struct pt_regs *regs) if (cascade->get_irq != NULL) { unsigned int source_irq = irq; desc = irq_desc + source_irq; - desc->handler->ack(source_irq); + desc->chip->ack(source_irq); irq = cascade->get_irq(irq, regs); if (irq < 0) atomic_inc(&irq_err_count); else irq_dispatch(irq, regs); - desc->handler->end(source_irq); + desc->chip->end(source_irq); } else do_IRQ(irq, regs); } diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c index 3e31f8193d21..2d287b8893d9 100644 --- a/arch/mips/vr41xx/common/vrc4173.c +++ b/arch/mips/vr41xx/common/vrc4173.c @@ -483,7 +483,7 @@ static inline int vrc4173_icu_init(int cascade_irq) vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW); for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) - irq_desc[i].handler = &vrc4173_irq_type; + irq_desc[i].chip = &vrc4173_irq_type; return 0; } diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c index 31db6b61a39e..7b2511ca0a61 100644 --- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c +++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c @@ -104,7 +104,7 @@ void __init rockhopper_init_irq(void) } for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) - irq_desc[i].handler = &i8259_irq_type; + irq_desc[i].chip = &i8259_irq_type; setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 197936d9359a..26e69f73fdb0 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -158,7 +158,7 @@ int show_interrupts(struct seq_file *p, void *v) seq_printf(p, "%10u ", kstat_irqs(i)); #endif - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); #ifndef PARISC_IRQ_CR16_COUNTS seq_printf(p, " %s", action->name); @@ -210,12 +210,12 @@ int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *type, void *data) { if (irq_desc[irq].action) return -EBUSY; - if (irq_desc[irq].handler != &cpu_interrupt_type) + if (irq_desc[irq].chip != &cpu_interrupt_type) return -EBUSY; if (type) { - irq_desc[irq].handler = type; - irq_desc[irq].handler_data = data; + irq_desc[irq].chip = type; + irq_desc[irq].chip_data = data; cpu_interrupt_type.enable(irq); } return 0; @@ -378,7 +378,7 @@ static void claim_cpu_irqs(void) { int i; for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { - irq_desc[i].handler = &cpu_interrupt_type; + irq_desc[i].chip = &cpu_interrupt_type; } irq_desc[TIMER_IRQ].action = &timer_action; diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c index e253a45dcf10..1bfad7c2f8c8 100644 --- a/arch/powerpc/kernel/crash.c +++ b/arch/powerpc/kernel/crash.c @@ -193,10 +193,10 @@ void default_machine_crash_shutdown(struct pt_regs *regs) struct irq_desc *desc = irq_descp(irq); if (desc->status & IRQ_INPROGRESS) - desc->handler->end(irq); + desc->chip->end(irq); if (!(desc->status & IRQ_DISABLED)) - desc->handler->disable(irq); + desc->chip->disable(irq); } if (ppc_md.kexec_cpu_down) diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 40d4c14fde8f..8cfc779d882d 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -120,8 +120,8 @@ int show_interrupts(struct seq_file *p, void *v) #else seq_printf(p, "%10u ", kstat_irqs(i)); #endif /* CONFIG_SMP */ - if (desc->handler) - seq_printf(p, " %s ", desc->handler->typename); + if (desc->chip) + seq_printf(p, " %s ", desc->chip->typename); else seq_puts(p, " None "); seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); @@ -169,8 +169,8 @@ void fixup_irqs(cpumask_t map) printk("Breaking affinity for irq %i\n", irq); mask = map; } - if (irq_desc[irq].handler->set_affinity) - irq_desc[irq].handler->set_affinity(irq, mask); + if (irq_desc[irq].chip->set_affinity) + irq_desc[irq].chip->set_affinity(irq, mask); else if (irq_desc[irq].action && !(warned++)) printk("Cannot set affinity for irq %i\n", irq); } diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c index 1bbf822b4efc..7bff3cbc5723 100644 --- a/arch/powerpc/platforms/cell/interrupt.c +++ b/arch/powerpc/platforms/cell/interrupt.c @@ -307,7 +307,7 @@ static void iic_request_ipi(int ipi, const char *name) irq = iic_ipi_to_irq(ipi); /* IPIs are marked SA_INTERRUPT as they must run with irqs * disabled */ - get_irq_desc(irq)->handler = &iic_pic; + get_irq_desc(irq)->chip = &iic_pic; get_irq_desc(irq)->status |= IRQ_PER_CPU; request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL); } @@ -330,7 +330,7 @@ static void iic_setup_spe_handlers(void) for (be=0; be < num_present_cpus() / 2; be++) { for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) { int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc; - get_irq_desc(irq)->handler = &iic_pic; + get_irq_desc(irq)->chip = &iic_pic; } } } diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index 55cbdd77a62d..7c3a0b6d34fd 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c @@ -162,7 +162,7 @@ void spider_init_IRQ_hardcoded(void) spider_pics[node] = ioremap(spiderpic, 0x800); for (n = 0; n < IIC_NUM_EXT; n++) { int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; - get_irq_desc(irq)->handler = &spider_pic; + get_irq_desc(irq)->chip = &spider_pic; } /* do not mask any interrupts because of level */ @@ -217,7 +217,7 @@ void spider_init_IRQ(void) for (n = 0; n < IIC_NUM_EXT; n++) { int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; - get_irq_desc(irq)->handler = &spider_pic; + get_irq_desc(irq)->chip = &spider_pic; } /* do not mask any interrupts because of level */ diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c index 62bbbcf5ded3..33bb4aa0e1e8 100644 --- a/arch/powerpc/platforms/iseries/irq.c +++ b/arch/powerpc/platforms/iseries/irq.c @@ -242,9 +242,9 @@ void __init iSeries_activate_IRQs() for_each_irq (irq) { irq_desc_t *desc = get_irq_desc(irq); - if (desc && desc->handler && desc->handler->startup) { + if (desc && desc->chip && desc->chip->startup) { spin_lock_irqsave(&desc->lock, flags); - desc->handler->startup(irq); + desc->chip->startup(irq); spin_unlock_irqrestore(&desc->lock, flags); } } @@ -324,7 +324,7 @@ int __init iSeries_allocate_IRQ(HvBusNumber bus, + function; virtirq = virt_irq_create_mapping(realirq); - irq_desc[virtirq].handler = &iSeries_IRQ_handler; + irq_desc[virtirq].chip = &iSeries_IRQ_handler; return virtirq; } diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 18bf3011d1e3..9f6189af6dd6 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c @@ -446,7 +446,7 @@ static void __init pmac_pic_probe_oldstyle(void) /* Set the handler for the main PIC */ for ( i = 0; i < max_real_irqs ; i++ ) - irq_desc[i].handler = &pmac_pic; + irq_desc[i].chip = &pmac_pic; /* Get addresses of first controller if we have a node for it */ BUG_ON(of_address_to_resource(master, 0, &r)); @@ -493,7 +493,7 @@ static void __init pmac_pic_probe_oldstyle(void) /* Setup handlers for secondary controller and hook cascade irq*/ if (slave) { for ( i = max_real_irqs ; i < max_irqs ; i++ ) - irq_desc[i].handler = &gatwick_pic; + irq_desc[i].chip = &gatwick_pic; setup_irq(irq_cascade, &gatwick_cascade_action); } printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index b14f9b5c114e..bdc9e26a93cf 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c @@ -558,7 +558,7 @@ nextnode: } for (i = irq_offset_value(); i < NR_IRQS; ++i) - get_irq_desc(i)->handler = &xics_pic; + get_irq_desc(i)->chip = &xics_pic; xics_setup_cpu(); @@ -701,9 +701,9 @@ void xics_migrate_irqs_away(void) continue; /* We only need to migrate enabled IRQS */ - if (desc == NULL || desc->handler == NULL + if (desc == NULL || desc->chip == NULL || desc->action == NULL - || desc->handler->set_affinity == NULL) + || desc->chip->set_affinity == NULL) continue; spin_lock_irqsave(&desc->lock, flags); @@ -728,7 +728,7 @@ void xics_migrate_irqs_away(void) virq, cpu); /* Reset affinity to all cpus */ - desc->handler->set_affinity(virq, CPU_MASK_ALL); + desc->chip->set_affinity(virq, CPU_MASK_ALL); irq_affinity[virq] = CPU_MASK_ALL; unlock: spin_unlock_irqrestore(&desc->lock, flags); diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index b7ac32fdd776..2bff30f6d635 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c @@ -208,7 +208,7 @@ void __init i8259_init(unsigned long intack_addr, int offset) spin_unlock_irqrestore(&i8259_lock, flags); for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) - irq_desc[offset + i].handler = &i8259_pic; + irq_desc[offset + i].chip = &i8259_pic; /* reserve our resources */ setup_irq(offset + 2, &i8259_irqaction); diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 8f01e0f1d847..46801f5ec03f 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -472,7 +472,7 @@ void __init ipic_init(phys_addr_t phys_addr, ipic_write(primary_ipic->regs, IPIC_SEMSR, temp); for (i = 0 ; i < NR_IPIC_INTS ; i++) { - irq_desc[i+irq_offset].handler = &ipic; + irq_desc[i+irq_offset].chip = &ipic; irq_desc[i+irq_offset].status = IRQ_LEVEL; } diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index bffe50d02c99..f4613ee6b7a2 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -379,14 +379,14 @@ static inline u32 mpic_physmask(u32 cpumask) /* Get the mpic structure from the IPI number */ static inline struct mpic * mpic_from_ipi(unsigned int ipi) { - return container_of(irq_desc[ipi].handler, struct mpic, hc_ipi); + return container_of(irq_desc[ipi].chip, struct mpic, hc_ipi); } #endif /* Get the mpic structure from the irq number */ static inline struct mpic * mpic_from_irq(unsigned int irq) { - return container_of(irq_desc[irq].handler, struct mpic, hc_irq); + return container_of(irq_desc[irq].chip, struct mpic, hc_irq); } /* Send an EOI */ @@ -752,7 +752,7 @@ void __init mpic_init(struct mpic *mpic) if (!(mpic->flags & MPIC_PRIMARY)) continue; irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU; - irq_desc[mpic->ipi_offset+i].handler = &mpic->hc_ipi; + irq_desc[mpic->ipi_offset+i].chip = &mpic->hc_ipi; #endif /* CONFIG_SMP */ } @@ -813,7 +813,7 @@ void __init mpic_init(struct mpic *mpic) /* init linux descriptors */ if (i < mpic->irq_count) { irq_desc[mpic->irq_offset+i].status = level ? IRQ_LEVEL : 0; - irq_desc[mpic->irq_offset+i].handler = &mpic->hc_irq; + irq_desc[mpic->irq_offset+i].chip = &mpic->hc_irq; } } diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c index 12b84ca51327..9b3ace26280c 100644 --- a/arch/ppc/8xx_io/commproc.c +++ b/arch/ppc/8xx_io/commproc.c @@ -187,7 +187,7 @@ cpm_interrupt_init(void) * interrupt vectors */ for ( i = CPM_IRQ_OFFSET ; i < CPM_IRQ_OFFSET + NR_CPM_INTS ; i++ ) - irq_desc[i].handler = &cpm_pic; + irq_desc[i].chip = &cpm_pic; /* Set our interrupt handler with the core CPU. */ if (setup_irq(CPM_INTERRUPT, &cpm_interrupt_irqaction)) diff --git a/arch/ppc/platforms/apus_setup.c b/arch/ppc/platforms/apus_setup.c index fe0cdc04d436..5c4118a459f3 100644 --- a/arch/ppc/platforms/apus_setup.c +++ b/arch/ppc/platforms/apus_setup.c @@ -734,9 +734,9 @@ void apus_init_IRQ(void) for ( i = 0 ; i < AMI_IRQS; i++ ) { irq_desc[i].status = IRQ_LEVEL; if (i < IRQ_AMIGA_AUTO) { - irq_desc[i].handler = &amiga_irqctrl; + irq_desc[i].chip = &amiga_irqctrl; } else { - irq_desc[i].handler = &amiga_sys_irqctrl; + irq_desc[i].chip = &amiga_sys_irqctrl; action = &amiga_sys_irqaction[i-IRQ_AMIGA_AUTO]; if (action->name) setup_irq(i, action); diff --git a/arch/ppc/platforms/sbc82xx.c b/arch/ppc/platforms/sbc82xx.c index 866807b4ad0b..41006d2b4b38 100644 --- a/arch/ppc/platforms/sbc82xx.c +++ b/arch/ppc/platforms/sbc82xx.c @@ -172,7 +172,7 @@ void __init sbc82xx_init_IRQ(void) /* Set up the interrupt handlers for the i8259 IRQs */ for (i = NR_SIU_INTS; i < NR_SIU_INTS + 8; i++) { - irq_desc[i].handler = &sbc82xx_i8259_ic; + irq_desc[i].chip = &sbc82xx_i8259_ic; irq_desc[i].status |= IRQ_LEVEL; } diff --git a/arch/ppc/syslib/cpc700_pic.c b/arch/ppc/syslib/cpc700_pic.c index 5add0a919ef6..172aa215fdb0 100644 --- a/arch/ppc/syslib/cpc700_pic.c +++ b/arch/ppc/syslib/cpc700_pic.c @@ -140,12 +140,12 @@ cpc700_init_IRQ(void) /* IRQ 0 is highest */ for (i = 0; i < 17; i++) { - irq_desc[i].handler = &cpc700_pic; + irq_desc[i].chip = &cpc700_pic; cpc700_pic_init_irq(i); } for (i = 20; i < 32; i++) { - irq_desc[i].handler = &cpc700_pic; + irq_desc[i].chip = &cpc700_pic; cpc700_pic_init_irq(i); } diff --git a/arch/ppc/syslib/cpm2_pic.c b/arch/ppc/syslib/cpm2_pic.c index 29d95d415ceb..c0fee0beb815 100644 --- a/arch/ppc/syslib/cpm2_pic.c +++ b/arch/ppc/syslib/cpm2_pic.c @@ -171,7 +171,7 @@ void cpm2_init_IRQ(void) /* Enable chaining to OpenPIC, and make everything level */ for (i = 0; i < NR_CPM_INTS; i++) { - irq_desc[i+CPM_IRQ_OFFSET].handler = &cpm2_pic; + irq_desc[i+CPM_IRQ_OFFSET].chip = &cpm2_pic; irq_desc[i+CPM_IRQ_OFFSET].status |= IRQ_LEVEL; } } diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c index dc3bd9ecbbf6..91096b38ae70 100644 --- a/arch/ppc/syslib/gt64260_pic.c +++ b/arch/ppc/syslib/gt64260_pic.c @@ -98,7 +98,7 @@ gt64260_init_irq(void) /* use the gt64260 for all (possible) interrupt sources */ for (i = gt64260_irq_base; i < (gt64260_irq_base + 96); i++) - irq_desc[i].handler = >64260_pic; + irq_desc[i].chip = >64260_pic; if (ppc_md.progress) ppc_md.progress("gt64260_init_irq: exit", 0x0); diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c index 1941a8c7ca9a..63fa5b313396 100644 --- a/arch/ppc/syslib/m82xx_pci.c +++ b/arch/ppc/syslib/m82xx_pci.c @@ -159,7 +159,7 @@ pq2pci_init_irq(void) immap->im_memctl.memc_or8 = 0xffff8010; #endif for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++) - irq_desc[irq].handler = &pq2pci_ic; + irq_desc[irq].chip = &pq2pci_ic; /* make PCI IRQ level sensitive */ immap->im_intctl.ic_siexr &= diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c index dae9af78bde1..0c4c0de7c59f 100644 --- a/arch/ppc/syslib/m8xx_setup.c +++ b/arch/ppc/syslib/m8xx_setup.c @@ -347,13 +347,13 @@ m8xx_init_IRQ(void) int i; for (i = SIU_IRQ_OFFSET ; i < SIU_IRQ_OFFSET + NR_SIU_INTS ; i++) - irq_desc[i].handler = &ppc8xx_pic; + irq_desc[i].chip = &ppc8xx_pic; cpm_interrupt_init(); #if defined(CONFIG_PCI) for (i = I8259_IRQ_OFFSET ; i < I8259_IRQ_OFFSET + NR_8259_INTS ; i++) - irq_desc[i].handler = &i8259_pic; + irq_desc[i].chip = &i8259_pic; i8259_pic_irq_offset = I8259_IRQ_OFFSET; i8259_init(0); diff --git a/arch/ppc/syslib/mpc52xx_pic.c b/arch/ppc/syslib/mpc52xx_pic.c index c4406f9dc6a3..6425b5cee7db 100644 --- a/arch/ppc/syslib/mpc52xx_pic.c +++ b/arch/ppc/syslib/mpc52xx_pic.c @@ -204,9 +204,9 @@ mpc52xx_init_irq(void) out_be32(&intr->main_pri1, 0); out_be32(&intr->main_pri2, 0); - /* Initialize irq_desc[i].handler's with mpc52xx_ic. */ + /* Initialize irq_desc[i].chip's with mpc52xx_ic. */ for (i = 0; i < NR_IRQS; i++) { - irq_desc[i].handler = &mpc52xx_ic; + irq_desc[i].chip = &mpc52xx_ic; irq_desc[i].status = IRQ_LEVEL; } diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c index 5a19697060f0..a4244d468381 100644 --- a/arch/ppc/syslib/mv64360_pic.c +++ b/arch/ppc/syslib/mv64360_pic.c @@ -119,7 +119,7 @@ mv64360_init_irq(void) /* All interrupts are level interrupts */ for (i = mv64360_irq_base; i < (mv64360_irq_base + 96); i++) { irq_desc[i].status |= IRQ_LEVEL; - irq_desc[i].handler = &mv64360_pic; + irq_desc[i].chip = &mv64360_pic; } if (ppc_md.progress) diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c index 70456c8f998c..822058c2983e 100644 --- a/arch/ppc/syslib/open_pic.c +++ b/arch/ppc/syslib/open_pic.c @@ -373,7 +373,7 @@ void __init openpic_init(int offset) OPENPIC_VEC_IPI+i+offset); /* IPIs are per-CPU */ irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU; - irq_desc[OPENPIC_VEC_IPI+i+offset].handler = &open_pic_ipi; + irq_desc[OPENPIC_VEC_IPI+i+offset].chip = &open_pic_ipi; } #endif @@ -408,7 +408,7 @@ void __init openpic_init(int offset) /* Init descriptors */ for (i = offset; i < NumSources + offset; i++) - irq_desc[i].handler = &open_pic; + irq_desc[i].chip = &open_pic; /* Initialize the spurious interrupt */ if (ppc_md.progress) ppc_md.progress("openpic: spurious",0x3bd); diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c index bcbe40de26fe..b8154efff6ed 100644 --- a/arch/ppc/syslib/open_pic2.c +++ b/arch/ppc/syslib/open_pic2.c @@ -290,7 +290,7 @@ void __init openpic2_init(int offset) /* Init descriptors */ for (i = offset; i < NumSources + offset; i++) - irq_desc[i].handler = &open_pic2; + irq_desc[i].chip = &open_pic2; /* Initialize the spurious interrupt */ if (ppc_md.progress) ppc_md.progress("openpic2: spurious",0x3bd); diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c index c46043c47225..1584c8b1229f 100644 --- a/arch/ppc/syslib/ppc403_pic.c +++ b/arch/ppc/syslib/ppc403_pic.c @@ -121,5 +121,5 @@ ppc4xx_pic_init(void) ppc_md.get_irq = ppc403_pic_get_irq; for (i = 0; i < NR_IRQS; i++) - irq_desc[i].handler = &ppc403_aic; + irq_desc[i].chip = &ppc403_aic; } diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c index fd9af0fc0e9f..e669c1335d47 100644 --- a/arch/ppc/syslib/ppc4xx_pic.c +++ b/arch/ppc/syslib/ppc4xx_pic.c @@ -276,7 +276,7 @@ void __init ppc4xx_pic_init(void) /* Attach low-level handlers */ for (i = 0; i < (NR_UICS << 5); ++i) { - irq_desc[i].handler = &__uic[i >> 5].decl; + irq_desc[i].chip = &__uic[i >> 5].decl; if (is_level_sensitive(i)) irq_desc[i].status |= IRQ_LEVEL; } diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c index e672b600f315..39a93dc6375b 100644 --- a/arch/ppc/syslib/xilinx_pic.c +++ b/arch/ppc/syslib/xilinx_pic.c @@ -143,7 +143,7 @@ ppc4xx_pic_init(void) ppc_md.get_irq = xilinx_pic_get_irq; for (i = 0; i < NR_IRQS; ++i) { - irq_desc[i].handler = &xilinx_intc; + irq_desc[i].chip = &xilinx_intc; if (XPAR_INTC_0_KIND_OF_INTR & (0x00000001 << i)) irq_desc[i].status &= ~IRQ_LEVEL; diff --git a/arch/sh/boards/adx/irq_maskreg.c b/arch/sh/boards/adx/irq_maskreg.c index c0973f8d57ba..357fab1bac2b 100644 --- a/arch/sh/boards/adx/irq_maskreg.c +++ b/arch/sh/boards/adx/irq_maskreg.c @@ -102,6 +102,6 @@ static void end_maskreg_irq(unsigned int irq) void make_maskreg_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &maskreg_irq_type; + irq_desc[irq].chip = &maskreg_irq_type; disable_maskreg_irq(irq); } diff --git a/arch/sh/boards/bigsur/irq.c b/arch/sh/boards/bigsur/irq.c index 6ddbcc77244d..1d32425782c0 100644 --- a/arch/sh/boards/bigsur/irq.c +++ b/arch/sh/boards/bigsur/irq.c @@ -253,7 +253,7 @@ static void make_bigsur_l1isr(unsigned int irq) { /* sanity check first */ if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { /* save the handler in the main description table */ - irq_desc[irq].handler = &bigsur_l1irq_type; + irq_desc[irq].chip = &bigsur_l1irq_type; irq_desc[irq].status = IRQ_DISABLED; irq_desc[irq].action = 0; irq_desc[irq].depth = 1; @@ -270,7 +270,7 @@ static void make_bigsur_l2isr(unsigned int irq) { /* sanity check first */ if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { /* save the handler in the main description table */ - irq_desc[irq].handler = &bigsur_l2irq_type; + irq_desc[irq].chip = &bigsur_l2irq_type; irq_desc[irq].status = IRQ_DISABLED; irq_desc[irq].action = 0; irq_desc[irq].depth = 1; diff --git a/arch/sh/boards/cqreek/irq.c b/arch/sh/boards/cqreek/irq.c index d1da0d844567..2955adc52310 100644 --- a/arch/sh/boards/cqreek/irq.c +++ b/arch/sh/boards/cqreek/irq.c @@ -103,7 +103,7 @@ void __init init_cqreek_IRQ(void) cqreek_irq_data[14].stat_port = BRIDGE_IDE_INTR_STAT; cqreek_irq_data[14].bit = 1; - irq_desc[14].handler = &cqreek_irq_type; + irq_desc[14].chip = &cqreek_irq_type; irq_desc[14].status = IRQ_DISABLED; irq_desc[14].action = 0; irq_desc[14].depth = 1; @@ -117,7 +117,7 @@ void __init init_cqreek_IRQ(void) cqreek_irq_data[10].bit = (1 << 10); /* XXX: Err... we may need demultiplexer for ISA irq... */ - irq_desc[10].handler = &cqreek_irq_type; + irq_desc[10].chip = &cqreek_irq_type; irq_desc[10].status = IRQ_DISABLED; irq_desc[10].action = 0; irq_desc[10].depth = 1; diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c index 55dece35cde5..0027b80a2343 100644 --- a/arch/sh/boards/dreamcast/setup.c +++ b/arch/sh/boards/dreamcast/setup.c @@ -70,7 +70,7 @@ int __init platform_setup(void) /* Assign all virtual IRQs to the System ASIC int. handler */ for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) - irq_desc[i].handler = &systemasic_int; + irq_desc[i].chip = &systemasic_int; board_time_init = aica_time_init; diff --git a/arch/sh/boards/ec3104/setup.c b/arch/sh/boards/ec3104/setup.c index 5130ba2b6ff1..4b3ef16a0e96 100644 --- a/arch/sh/boards/ec3104/setup.c +++ b/arch/sh/boards/ec3104/setup.c @@ -63,7 +63,7 @@ int __init platform_setup(void) str[i] = ctrl_readb(EC3104_BASE + i); for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++) - irq_desc[i].handler = &ec3104_int; + irq_desc[i].chip = &ec3104_int; printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n", str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE); diff --git a/arch/sh/boards/harp/irq.c b/arch/sh/boards/harp/irq.c index 52d0ba39031b..701fa55d5297 100644 --- a/arch/sh/boards/harp/irq.c +++ b/arch/sh/boards/harp/irq.c @@ -114,7 +114,7 @@ static void enable_harp_irq(unsigned int irq) static void __init make_harp_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &harp_irq_type; + irq_desc[irq].chip = &harp_irq_type; disable_harp_irq(irq); } diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c index 2bb581b91683..b72f009c52c2 100644 --- a/arch/sh/boards/mpc1211/setup.c +++ b/arch/sh/boards/mpc1211/setup.c @@ -194,7 +194,7 @@ static struct hw_interrupt_type mpc1211_irq_type = { static void make_mpc1211_irq(unsigned int irq) { - irq_desc[irq].handler = &mpc1211_irq_type; + irq_desc[irq].chip = &mpc1211_irq_type; irq_desc[irq].status = IRQ_DISABLED; irq_desc[irq].action = 0; irq_desc[irq].depth = 1; diff --git a/arch/sh/boards/overdrive/irq.c b/arch/sh/boards/overdrive/irq.c index 715e8feb3a68..2c13a7de6b22 100644 --- a/arch/sh/boards/overdrive/irq.c +++ b/arch/sh/boards/overdrive/irq.c @@ -150,7 +150,7 @@ static void enable_od_irq(unsigned int irq) static void __init make_od_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &od_irq_type; + irq_desc[irq].chip = &od_irq_type; disable_od_irq(irq); } diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c index ed4c5b50ea45..52a98b524e1f 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/irq.c +++ b/arch/sh/boards/renesas/hs7751rvoip/irq.c @@ -86,7 +86,7 @@ static struct hw_interrupt_type hs7751rvoip_irq_type = { static void make_hs7751rvoip_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &hs7751rvoip_irq_type; + irq_desc[irq].chip = &hs7751rvoip_irq_type; disable_hs7751rvoip_irq(irq); } diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c index d36c9374aed1..e16915d9cda4 100644 --- a/arch/sh/boards/renesas/rts7751r2d/irq.c +++ b/arch/sh/boards/renesas/rts7751r2d/irq.c @@ -100,7 +100,7 @@ static struct hw_interrupt_type rts7751r2d_irq_type = { static void make_rts7751r2d_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &rts7751r2d_irq_type; + irq_desc[irq].chip = &rts7751r2d_irq_type; disable_rts7751r2d_irq(irq); } diff --git a/arch/sh/boards/renesas/systemh/irq.c b/arch/sh/boards/renesas/systemh/irq.c index 7a2eb10edb56..845979181059 100644 --- a/arch/sh/boards/renesas/systemh/irq.c +++ b/arch/sh/boards/renesas/systemh/irq.c @@ -105,7 +105,7 @@ static void end_systemh_irq(unsigned int irq) void make_systemh_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &systemh_irq_type; + irq_desc[irq].chip = &systemh_irq_type; disable_systemh_irq(irq); } diff --git a/arch/sh/boards/se/73180/irq.c b/arch/sh/boards/se/73180/irq.c index 70f04caad9a4..402735c7c898 100644 --- a/arch/sh/boards/se/73180/irq.c +++ b/arch/sh/boards/se/73180/irq.c @@ -85,7 +85,7 @@ void make_intreq_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &intreq_irq_type; + irq_desc[irq].chip = &intreq_irq_type; disable_intreq_irq(irq); } diff --git a/arch/sh/boards/superh/microdev/irq.c b/arch/sh/boards/superh/microdev/irq.c index efcbd86b7cd2..cb5999425d16 100644 --- a/arch/sh/boards/superh/microdev/irq.c +++ b/arch/sh/boards/superh/microdev/irq.c @@ -147,7 +147,7 @@ static void enable_microdev_irq(unsigned int irq) static void __init make_microdev_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = µdev_irq_type; + irq_desc[irq].chip = µdev_irq_type; disable_microdev_irq(irq); } diff --git a/arch/sh/cchips/hd6446x/hd64461/setup.c b/arch/sh/cchips/hd6446x/hd64461/setup.c index f014b9bf6922..724db04cb392 100644 --- a/arch/sh/cchips/hd6446x/hd64461/setup.c +++ b/arch/sh/cchips/hd6446x/hd64461/setup.c @@ -154,7 +154,7 @@ int __init setup_hd64461(void) outw(0xffff, HD64461_NIMR); for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) { - irq_desc[i].handler = &hd64461_irq_type; + irq_desc[i].chip = &hd64461_irq_type; } setup_irq(CONFIG_HD64461_IRQ, &irq0); diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c index 68e4c4e4283d..cf9142c620b7 100644 --- a/arch/sh/cchips/hd6446x/hd64465/setup.c +++ b/arch/sh/cchips/hd6446x/hd64465/setup.c @@ -182,7 +182,7 @@ static int __init setup_hd64465(void) outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */ for (i = 0; i < HD64465_IRQ_NUM ; i++) { - irq_desc[HD64465_IRQ_BASE + i].handler = &hd64465_irq_type; + irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type; } setup_irq(CONFIG_HD64465_IRQ, &irq0); diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c index 2ee330b3c38f..892214bade19 100644 --- a/arch/sh/cchips/voyagergx/irq.c +++ b/arch/sh/cchips/voyagergx/irq.c @@ -191,7 +191,7 @@ void __init setup_voyagergx_irq(void) flag = 1; } if (flag == 1) - irq_desc[VOYAGER_IRQ_BASE + i].handler = &voyagergx_irq_type; + irq_desc[VOYAGER_IRQ_BASE + i].chip = &voyagergx_irq_type; } setup_irq(IRQ_VOYAGER, &irq0); diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c index baed9a550d39..a33ae3e0a5a5 100644 --- a/arch/sh/kernel/cpu/irq/imask.c +++ b/arch/sh/kernel/cpu/irq/imask.c @@ -105,6 +105,6 @@ static void shutdown_imask_irq(unsigned int irq) void make_imask_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &imask_irq_type; + irq_desc[irq].chip = &imask_irq_type; enable_irq(irq); } diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c index 06e8afab32e4..30064bf6e154 100644 --- a/arch/sh/kernel/cpu/irq/intc2.c +++ b/arch/sh/kernel/cpu/irq/intc2.c @@ -137,7 +137,7 @@ void make_intc2_irq(unsigned int irq, local_irq_restore(flags); - irq_desc[irq].handler = &intc2_irq_type; + irq_desc[irq].chip = &intc2_irq_type; disable_intc2_irq(irq); } diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c index e55150ed0856..0373b65c77f9 100644 --- a/arch/sh/kernel/cpu/irq/ipr.c +++ b/arch/sh/kernel/cpu/irq/ipr.c @@ -115,7 +115,7 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority) ipr_data[irq].shift = pos*4; /* POSition (0-3) x 4 means shift */ ipr_data[irq].priority = priority; - irq_desc[irq].handler = &ipr_irq_type; + irq_desc[irq].chip = &ipr_irq_type; disable_ipr_irq(irq); } diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c index 95d6024fe1ae..714963a25bba 100644 --- a/arch/sh/kernel/cpu/irq/pint.c +++ b/arch/sh/kernel/cpu/irq/pint.c @@ -85,7 +85,7 @@ static void end_pint_irq(unsigned int irq) void make_pint_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &pint_irq_type; + irq_desc[irq].chip = &pint_irq_type; disable_pint_irq(irq); } diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c index b56e79632f24..c2e07f7f3496 100644 --- a/arch/sh/kernel/irq.c +++ b/arch/sh/kernel/irq.c @@ -47,7 +47,7 @@ int show_interrupts(struct seq_file *p, void *v) goto unlock; seq_printf(p, "%3d: ",i); seq_printf(p, "%10u ", kstat_irqs(i)); - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) diff --git a/arch/sh64/kernel/irq.c b/arch/sh64/kernel/irq.c index d69879c0e063..675776a5477e 100644 --- a/arch/sh64/kernel/irq.c +++ b/arch/sh64/kernel/irq.c @@ -65,7 +65,7 @@ int show_interrupts(struct seq_file *p, void *v) goto unlock; seq_printf(p, "%3d: ",i); seq_printf(p, "%10u ", kstat_irqs(i)); - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) diff --git a/arch/sh64/kernel/irq_intc.c b/arch/sh64/kernel/irq_intc.c index fc99bf4e362c..fa730f5fe2e6 100644 --- a/arch/sh64/kernel/irq_intc.c +++ b/arch/sh64/kernel/irq_intc.c @@ -178,7 +178,7 @@ static void end_intc_irq(unsigned int irq) void make_intc_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &intc_irq_type; + irq_desc[irq].chip = &intc_irq_type; disable_intc_irq(irq); } @@ -208,7 +208,7 @@ void __init init_IRQ(void) /* Set default: per-line enable/disable, priority driven ack/eoi */ for (i = 0; i < NR_INTC_IRQS; i++) { if (platform_int_priority[i] != NO_PRIORITY) { - irq_desc[i].handler = &intc_irq_type; + irq_desc[i].chip = &intc_irq_type; } } diff --git a/arch/sh64/mach-cayman/irq.c b/arch/sh64/mach-cayman/irq.c index f797c84bfdd1..05eb7cdc26f0 100644 --- a/arch/sh64/mach-cayman/irq.c +++ b/arch/sh64/mach-cayman/irq.c @@ -187,7 +187,7 @@ void init_cayman_irq(void) } for (i=0; i<NR_EXT_IRQS; i++) { - irq_desc[START_EXT_IRQS + i].handler = &cayman_irq_type; + irq_desc[START_EXT_IRQS + i].chip = &cayman_irq_type; } /* Setup the SMSC interrupt */ diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c index cc89b06d0178..5d7c821ab7f6 100644 --- a/arch/sparc64/kernel/irq.c +++ b/arch/sparc64/kernel/irq.c @@ -151,7 +151,7 @@ int show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #endif - seq_printf(p, " %9s", irq_desc[i].handler->typename); + seq_printf(p, " %9s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) @@ -414,8 +414,8 @@ void irq_install_pre_handler(int virt_irq, data->pre_handler_arg1 = arg1; data->pre_handler_arg2 = arg2; - desc->handler = (desc->handler == &sun4u_irq ? - &sun4u_irq_ack : &sun4v_irq_ack); + desc->chip = (desc->chip == &sun4u_irq ? + &sun4u_irq_ack : &sun4v_irq_ack); } unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) @@ -431,7 +431,7 @@ unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) bucket = &ivector_table[ino]; if (!bucket->virt_irq) { bucket->virt_irq = virt_irq_alloc(__irq(bucket)); - irq_desc[bucket->virt_irq].handler = &sun4u_irq; + irq_desc[bucket->virt_irq].chip = &sun4u_irq; } desc = irq_desc + bucket->virt_irq; @@ -465,7 +465,7 @@ unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino) bucket = &ivector_table[sysino]; if (!bucket->virt_irq) { bucket->virt_irq = virt_irq_alloc(__irq(bucket)); - irq_desc[bucket->virt_irq].handler = &sun4v_irq; + irq_desc[bucket->virt_irq].chip = &sun4v_irq; } desc = irq_desc + bucket->virt_irq; diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c index 2ffda012385e..fae43a3054a0 100644 --- a/arch/um/kernel/irq.c +++ b/arch/um/kernel/irq.c @@ -63,7 +63,7 @@ int show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #endif - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) @@ -451,13 +451,13 @@ void __init init_IRQ(void) irq_desc[TIMER_IRQ].status = IRQ_DISABLED; irq_desc[TIMER_IRQ].action = NULL; irq_desc[TIMER_IRQ].depth = 1; - irq_desc[TIMER_IRQ].handler = &SIGVTALRM_irq_type; + irq_desc[TIMER_IRQ].chip = &SIGVTALRM_irq_type; enable_irq(TIMER_IRQ); for (i = 1; i < NR_IRQS; i++) { irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &normal_irq_type; + irq_desc[i].chip = &normal_irq_type; enable_irq(i); } } diff --git a/arch/v850/kernel/irq.c b/arch/v850/kernel/irq.c index 7a151c26f82e..858c45819aab 100644 --- a/arch/v850/kernel/irq.c +++ b/arch/v850/kernel/irq.c @@ -65,10 +65,10 @@ int show_interrupts(struct seq_file *p, void *v) int j; int count = 0; int num = -1; - const char *type_name = irq_desc[irq].handler->typename; + const char *type_name = irq_desc[irq].chip->typename; for (j = 0; j < NR_IRQS; j++) - if (irq_desc[j].handler->typename == type_name){ + if (irq_desc[j].chip->typename == type_name){ if (irq == j) num = count; count++; @@ -117,7 +117,7 @@ init_irq_handlers (int base_irq, int num, int interval, irq_desc[base_irq].status = IRQ_DISABLED; irq_desc[base_irq].action = NULL; irq_desc[base_irq].depth = 1; - irq_desc[base_irq].handler = irq_type; + irq_desc[base_irq].chip = irq_type; base_irq += interval; } } diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c index 86b2c1e197aa..3dd1659427dc 100644 --- a/arch/x86_64/kernel/i8259.c +++ b/arch/x86_64/kernel/i8259.c @@ -235,7 +235,7 @@ void make_8259A_irq(unsigned int irq) { disable_irq_nosync(irq); io_apic_irqs &= ~(1<<irq); - irq_desc[irq].handler = &i8259A_irq_type; + irq_desc[irq].chip = &i8259A_irq_type; enable_irq(irq); } @@ -468,12 +468,12 @@ void __init init_ISA_irqs (void) /* * 16 old-style INTA-cycle interrupts: */ - irq_desc[i].handler = &i8259A_irq_type; + irq_desc[i].chip = &i8259A_irq_type; } else { /* * 'high' PCI IRQs filled in on demand */ - irq_desc[i].handler = &no_irq_type; + irq_desc[i].chip = &no_irq_type; } } } diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index c768d8a036d0..88a8736eb8ce 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c @@ -876,15 +876,17 @@ static struct hw_interrupt_type ioapic_edge_type; #define IOAPIC_EDGE 0 #define IOAPIC_LEVEL 1 -static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger) +static void ioapic_register_intr(int irq, int vector, unsigned long trigger) { - unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; + unsigned idx; + + idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || trigger == IOAPIC_LEVEL) - irq_desc[idx].handler = &ioapic_level_type; + irq_desc[idx].chip = &ioapic_level_type; else - irq_desc[idx].handler = &ioapic_edge_type; + irq_desc[idx].chip = &ioapic_edge_type; set_intr_gate(vector, interrupt[idx]); } @@ -986,7 +988,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in * The timer IRQ doesn't have to know that behind the * scene we have a 8259A-master in AEOI mode ... */ - irq_desc[0].handler = &ioapic_edge_type; + irq_desc[0].chip = &ioapic_edge_type; /* * Add it to the IO-APIC irq-routing table: @@ -1683,7 +1685,7 @@ static inline void init_IO_APIC_traps(void) make_8259A_irq(irq); else /* Strange. Oh, well.. */ - irq_desc[irq].handler = &no_irq_type; + irq_desc[irq].chip = &no_irq_type; } } } @@ -1900,7 +1902,7 @@ static inline void check_timer(void) apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); disable_8259A_irq(0); - irq_desc[0].handler = &lapic_irq_type; + irq_desc[0].chip = &lapic_irq_type; apic_write(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ enable_8259A_irq(0); diff --git a/arch/x86_64/kernel/irq.c b/arch/x86_64/kernel/irq.c index bfa82f52a5cc..0c2fb2c77bd0 100644 --- a/arch/x86_64/kernel/irq.c +++ b/arch/x86_64/kernel/irq.c @@ -79,7 +79,7 @@ int show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #endif - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) @@ -151,8 +151,8 @@ void fixup_irqs(cpumask_t map) printk("Breaking affinity for irq %i\n", irq); mask = map; } - if (irq_desc[irq].handler->set_affinity) - irq_desc[irq].handler->set_affinity(irq, mask); + if (irq_desc[irq].chip->set_affinity) + irq_desc[irq].chip->set_affinity(irq, mask); else if (irq_desc[irq].action && !(warned++)) printk("Cannot set affinity for irq %i\n", irq); } diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c index 51f9bed455fa..1cf744ee0959 100644 --- a/arch/xtensa/kernel/irq.c +++ b/arch/xtensa/kernel/irq.c @@ -100,7 +100,7 @@ int show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #endif - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) @@ -181,7 +181,7 @@ void __init init_IRQ(void) int i; for (i=0; i < XTENSA_NR_IRQS; i++) - irq_desc[i].handler = &xtensa_irq_type; + irq_desc[i].chip = &xtensa_irq_type; cached_irq_mask = 0; |