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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-02-26 16:18:31 +0900
committerArnd Bergmann <arnd@arndb.de>2016-03-18 17:39:04 +0100
commit61f838c7faad95a5ae105a136e14d1c7b372c970 (patch)
tree0ad81eba045cc1dee26464d72c45c4df808588f7 /arch
parent14bae133b8712206d49d57574dc6a25d18b40dcf (diff)
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ARM: dts: uniphier: add reference clock nodes
Add master clock nodes generated by crystal oscillators. PH1-sLD3, PH1-LD4: 24.576 MHz PH1-Pro4, ProXstream2: 25.000 MHz PH1-Pro5: 20.000 MHz Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/uniphier-common32.dtsi7
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-ld4.dtsi4
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-pro4.dtsi4
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-pro5.dtsi4
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-sld3.dtsi6
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-sld8.dtsi4
-rw-r--r--arch/arm/boot/dts/uniphier-proxstream2.dtsi4
7 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-common32.dtsi b/arch/arm/boot/dts/uniphier-common32.dtsi
index f847e6878011..61a095598206 100644
--- a/arch/arm/boot/dts/uniphier-common32.dtsi
+++ b/arch/arm/boot/dts/uniphier-common32.dtsi
@@ -45,6 +45,13 @@
/include/ "skeleton.dtsi"
/ {
+ clocks {
+ refclk: ref {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+ };
+
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
index 34f0d8dcd814..dadd86070c98 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
@@ -173,6 +173,10 @@
};
+&refclk {
+ clock-frequency = <24576000>;
+};
+
&serial3 {
interrupts = <0 29 4>;
};
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
index d78142fb35c4..20f3f2ae7fa4 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
@@ -195,6 +195,10 @@
};
};
+&refclk {
+ clock-frequency = <25000000>;
+};
+
&pinctrl {
compatible = "socionext,ph1-pro4-pinctrl", "syscon";
};
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
index 2f389ea75e01..24f6f664b269 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
@@ -189,6 +189,10 @@
};
};
+&refclk {
+ clock-frequency = <20000000>;
+};
+
&pinctrl {
compatible = "socionext,ph1-pro5-pinctrl", "syscon";
};
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
index 4c746ea24ee1..03292f443305 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
@@ -68,6 +68,12 @@
};
clocks {
+ refclk: ref {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24576000>;
+ };
+
arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
index 7d06a1c487d8..6bfd29a05575 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
@@ -172,6 +172,10 @@
};
};
+&refclk {
+ clock-frequency = <25000000>;
+};
+
&serial3 {
interrupts = <0 29 4>;
};
diff --git a/arch/arm/boot/dts/uniphier-proxstream2.dtsi b/arch/arm/boot/dts/uniphier-proxstream2.dtsi
index 6bd353f2d77e..4ac484c6ce4e 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/boot/dts/uniphier-proxstream2.dtsi
@@ -200,6 +200,10 @@
};
};
+&refclk {
+ clock-frequency = <25000000>;
+};
+
&pinctrl {
compatible = "socionext,proxstream2-pinctrl", "syscon";
};