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authorAndrew Murray <andrew.murray@arm.com>2019-04-09 20:22:10 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2019-04-24 15:34:31 +0100
commit21bb0ebf5d78c669ed887f30889f2d28cf6bf7db (patch)
treecead3b66ba563216de2f225829cc4401d2665b5e /arch
parenta243c16d18be130b17cf1064e9115de73bfdff5a (diff)
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arm64: arm_pmu: Remove unnecessary isb instruction
The armv8pmu_enable_event_counter function issues an isb instruction after enabling a pair of counters - this doesn't provide any value and is inconsistent with the armv8pmu_disable_event_counter. In any case armv8pmu_enable_event_counter is always called with the PMU stopped. Starting the PMU with armv8pmu_start results in an isb instruction being issued prior to writing to PMCR_EL0. Let's remove the unnecessary isb instruction. Signed-off-by: Andrew Murray <andrew.murray@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/kernel/perf_event.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 4addb38bc250..cccf4fc86d67 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -533,7 +533,6 @@ static inline void armv8pmu_enable_event_counter(struct perf_event *event)
armv8pmu_enable_counter(idx);
if (armv8pmu_event_is_chained(event))
armv8pmu_enable_counter(idx - 1);
- isb();
}
static inline int armv8pmu_disable_counter(int idx)