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authorBeniamino Galvani <b.galvani@gmail.com>2014-11-18 15:25:41 +0100
committerCarlo Caione <carlo@caione.org>2014-11-18 16:35:01 +0100
commit6a4ccd9a8e7cc2169b1c623d98d01201e9dcbacc (patch)
tree57f56c132d077c5a072ee7017e9287c937cce89c /arch
parenta25a6772db05b252d9861b80b6387b67f69a8b8e (diff)
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ARM: meson: enable L2 cache
This enables the L2 cache controller available in Amlogic SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-meson/Kconfig1
-rw-r--r--arch/arm/mach-meson/meson.c2
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index b289e8e1625f..18301dc9d2e7 100644
--- a/arch/arm/mach-meson/Kconfig
+++ b/arch/arm/mach-meson/Kconfig
@@ -2,6 +2,7 @@ menuconfig ARCH_MESON
bool "Amlogic Meson SoCs" if ARCH_MULTI_V7
select GENERIC_IRQ_CHIP
select ARM_GIC
+ select CACHE_L2X0
if ARCH_MESON
diff --git a/arch/arm/mach-meson/meson.c b/arch/arm/mach-meson/meson.c
index 8f42d8fbb505..5d6affe6a694 100644
--- a/arch/arm/mach-meson/meson.c
+++ b/arch/arm/mach-meson/meson.c
@@ -24,4 +24,6 @@ static const char * const meson_common_board_compat[] = {
DT_MACHINE_START(MESON, "Amlogic Meson platform")
.dt_compat = meson_common_board_compat,
+ .l2c_aux_val = 0,
+ .l2c_aux_mask = ~0,
MACHINE_END