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| author | Dave Airlie <airlied@linux.ie> | 2007-10-29 18:06:10 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2008-02-05 14:33:32 +1000 |
| commit | 6c00a61e1bc969c3ea931f62f8789d9818bf1918 (patch) | |
| tree | 6ec75d02be64dd7ad4480f03ce800c53bc355a10 /arch | |
| parent | a13af4b4d842da6d7065b8c73fa8f0ac58fea1b6 (diff) | |
| download | linux-6c00a61e1bc969c3ea931f62f8789d9818bf1918.tar.gz linux-6c00a61e1bc969c3ea931f62f8789d9818bf1918.tar.bz2 linux-6c00a61e1bc969c3ea931f62f8789d9818bf1918.zip | |
intel-agp: add chipset flushing support
This adds support for flushing the chipsets on the 915, 945, 965 and G33
families of Intel chips.
The BIOS doesn't seem to always allocate the BAR on the 965 chipsets
so I have to use pci resource code to create a resource
It adds an export for pcibios_align_resource.
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/pci/i386.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index 42ba0e2da1a0..103b9dff1213 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -72,7 +72,7 @@ pcibios_align_resource(void *data, struct resource *res, } } } - +EXPORT_SYMBOL(pcibios_align_resource); /* * Handle resources of PCI devices. If the world were perfect, we could |