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author | Alexander Graf <agraf@suse.de> | 2013-04-15 10:42:33 +0200 |
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committer | Alexander Graf <agraf@suse.de> | 2013-04-26 20:27:13 +0200 |
commit | 8175e5b79c38a1d85225da516fa1a0ecbf2fdbca (patch) | |
tree | 9fdf768971d7c10292a34b9d15c5f7a1abe1301c /crypto/md5.c | |
parent | c35635efdc0312e013ebda1c8f3b5dd038c0d0e7 (diff) | |
download | linux-8175e5b79c38a1d85225da516fa1a0ecbf2fdbca.tar.gz linux-8175e5b79c38a1d85225da516fa1a0ecbf2fdbca.tar.bz2 linux-8175e5b79c38a1d85225da516fa1a0ecbf2fdbca.zip |
KVM: Add KVM_IRQCHIP_NUM_PINS in addition to KVM_IOAPIC_NUM_PINS
The concept of routing interrupt lines to an irqchip is nothing
that is IOAPIC specific. Every irqchip has a maximum number of pins
that can be linked to irq lines.
So let's add a new define that allows us to reuse generic code for
non-IOAPIC platforms.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'crypto/md5.c')
0 files changed, 0 insertions, 0 deletions