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authorOlof Johansson <olof@lixom.net>2013-06-14 14:31:36 -0700
committerOlof Johansson <olof@lixom.net>2013-06-14 14:32:01 -0700
commit10f8902b47340fc792cf503dd3caaba410d23615 (patch)
treec81e0af4e9b3b7c2f221c74c02dea034350f8907 /drivers/ata/ata_piix.c
parenteb25862dee69a0a0ba835f6ed093c75f8ed3123b (diff)
parent4f288f081bb67813d35c10d1b2fa68e863c4b188 (diff)
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Merge tag 'omap-for-v3.11/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren: Omap SoC changes. Mostly improves am33xx support, and adds minimal support for am43x SoCs. * tag 'omap-for-v3.11/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: AM43x: SRAM base and size ARM: OMAP2+: AM43x: GP or HS ? ARM: OMAP2+: AM43x: early init ARM: OMAP2+: AM43x: static mapping ARM: OMAP2+: AM437x: SoC revision detection ARM: OMAP2+: AM43x: soc_is support ARM: OMAP2+: AM43x: kbuild ARM: OMAP2+: AM43x: Kconfig ARM: OMAP2+: separate out OMAP4 restart ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK ARM: OMAP3: clock data: get rid of unused USB host clock aliases and dummies ARM: OMAP2+: AM33xx: Add missing reset status info to GFX hwmod + Linux 3.10-rc5 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/ata/ata_piix.c')
-rw-r--r--drivers/ata/ata_piix.c17
1 files changed, 16 insertions, 1 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 2f48123d74c4..9a8a674e8fac 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -1,7 +1,7 @@
/*
* ata_piix.c - Intel PATA/SATA controllers
*
- * Maintained by: Jeff Garzik <jgarzik@pobox.com>
+ * Maintained by: Tejun Heo <tj@kernel.org>
* Please ALWAYS copy linux-ide@vger.kernel.org
* on emails.
*
@@ -151,6 +151,7 @@ enum piix_controller_ids {
piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
ich8_sata_snb,
ich8_2port_sata_snb,
+ ich8_2port_sata_byt,
};
struct piix_map_db {
@@ -334,6 +335,9 @@ static const struct pci_device_id piix_pci_tbl[] = {
{ 0x8086, 0x8d60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
/* SATA Controller IDE (Wellsburg) */
{ 0x8086, 0x8d68, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
+ /* SATA Controller IDE (BayTrail) */
+ { 0x8086, 0x0F20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
+ { 0x8086, 0x0F21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
{ } /* terminate list */
};
@@ -441,6 +445,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
[tolapai_sata] = &tolapai_map_db,
[ich8_sata_snb] = &ich8_map_db,
[ich8_2port_sata_snb] = &ich8_2port_map_db,
+ [ich8_2port_sata_byt] = &ich8_2port_map_db,
};
static struct pci_bits piix_enable_bits[] = {
@@ -1254,6 +1259,16 @@ static struct ata_port_info piix_port_info[] = {
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
+
+ [ich8_2port_sata_byt] =
+ {
+ .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR | PIIX_FLAG_PIO16,
+ .pio_mask = ATA_PIO4,
+ .mwdma_mask = ATA_MWDMA2,
+ .udma_mask = ATA_UDMA6,
+ .port_ops = &piix_sata_ops,
+ },
+
};
#define AHCI_PCI_BAR 5