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| author | David S. Miller <davem@davemloft.net> | 2008-06-13 20:52:39 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-06-13 20:52:39 -0700 |
| commit | 4ae127d1b6c71f9240dd4245f240e6dd8fc98014 (patch) | |
| tree | b7aa27b3e0c655f4613fe2146cb57d7f69e421f6 /drivers/ata/sata_mv.c | |
| parent | 875ec4333b99144e2589e900a0bcd2c25c757b27 (diff) | |
| parent | 7775c9753b94fe429dc4323360d6502c95e0dd6e (diff) | |
| download | linux-4ae127d1b6c71f9240dd4245f240e6dd8fc98014.tar.gz linux-4ae127d1b6c71f9240dd4245f240e6dd8fc98014.tar.bz2 linux-4ae127d1b6c71f9240dd4245f240e6dd8fc98014.zip | |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/smc911x.c
Diffstat (limited to 'drivers/ata/sata_mv.c')
| -rw-r--r-- | drivers/ata/sata_mv.c | 24 |
1 files changed, 14 insertions, 10 deletions
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index acf347f71a2f..60391e9a84db 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -224,6 +224,11 @@ enum { PHY_MODE3 = 0x310, PHY_MODE4 = 0x314, + PHY_MODE4_CFG_MASK = 0x00000003, /* phy internal config field */ + PHY_MODE4_CFG_VALUE = 0x00000001, /* phy internal config field */ + PHY_MODE4_RSVD_ZEROS = 0x5de3fffa, /* Gen2e always write zeros */ + PHY_MODE4_RSVD_ONES = 0x00000005, /* Gen2e always write ones */ + PHY_MODE2 = 0x330, SATA_IFCTL_OFS = 0x344, SATA_TESTCTL_OFS = 0x348, @@ -2563,17 +2568,16 @@ static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio, m3 &= ~0x1c; if (fix_phy_mode4) { - u32 m4; - - m4 = readl(port_mmio + PHY_MODE4); - - /* workaround for errata FEr SATA#10 (part 1) */ - m4 = (m4 & ~(1 << 1)) | (1 << 0); - - /* enforce bit restrictions on GenIIe devices */ + u32 m4 = readl(port_mmio + PHY_MODE4); + /* + * Enforce reserved-bit restrictions on GenIIe devices only. + * For earlier chipsets, force only the internal config field + * (workaround for errata FEr SATA#10 part 1). + */ if (IS_GEN_IIE(hpriv)) - m4 = (m4 & ~0x5DE3FFFC) | (1 << 2); - + m4 = (m4 & ~PHY_MODE4_RSVD_ZEROS) | PHY_MODE4_RSVD_ONES; + else + m4 = (m4 & ~PHY_MODE4_CFG_MASK) | PHY_MODE4_CFG_VALUE; writel(m4, port_mmio + PHY_MODE4); } /* |