summaryrefslogtreecommitdiffstats
path: root/drivers/ata
diff options
context:
space:
mode:
authorTina Ruchandani <ruchandani.tina@gmail.com>2015-01-27 15:49:48 +0530
committerTejun Heo <tj@kernel.org>2015-01-27 11:06:19 -0500
commitcedda4c3b1ded2cc4951aeca38fdf862b9b79fb6 (patch)
tree2f02198d245329c9901f9d58484bdb67da95db01 /drivers/ata
parent552941503b9500a99be06cc9f60348099435b160 (diff)
downloadlinux-cedda4c3b1ded2cc4951aeca38fdf862b9b79fb6.tar.gz
linux-cedda4c3b1ded2cc4951aeca38fdf862b9b79fb6.tar.bz2
linux-cedda4c3b1ded2cc4951aeca38fdf862b9b79fb6.zip
pata_pdc2027x: Use 64-bit timekeeping
Function pdc_detect_pll_input_clock uses 'struct timeval' to measure start and end times, used to compute the pll_clock value. 'struct timeval' on 32-bit systems will have its tv_sec field overflow in year 2038 and beyond. This patch uses 'ktime_t' (which uses 64 bits for seconds) for start and end times instead. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Tina Ruchandani <ruchandani.tina@gmail.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/pata_pdc2027x.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c
index 4d06a5cda987..dca8251b1aea 100644
--- a/drivers/ata/pata_pdc2027x.c
+++ b/drivers/ata/pata_pdc2027x.c
@@ -28,6 +28,7 @@
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/device.h>
+#include <linux/ktime.h>
#include <scsi/scsi.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi_cmnd.h>
@@ -605,7 +606,7 @@ static long pdc_detect_pll_input_clock(struct ata_host *host)
void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
u32 scr;
long start_count, end_count;
- struct timeval start_time, end_time;
+ ktime_t start_time, end_time;
long pll_clock, usec_elapsed;
/* Start the test mode */
@@ -616,14 +617,14 @@ static long pdc_detect_pll_input_clock(struct ata_host *host)
/* Read current counter value */
start_count = pdc_read_counter(host);
- do_gettimeofday(&start_time);
+ start_time = ktime_get();
/* Let the counter run for 100 ms. */
mdelay(100);
/* Read the counter values again */
end_count = pdc_read_counter(host);
- do_gettimeofday(&end_time);
+ end_time = ktime_get();
/* Stop the test mode */
scr = ioread32(mmio_base + PDC_SYS_CTL);
@@ -632,8 +633,7 @@ static long pdc_detect_pll_input_clock(struct ata_host *host)
ioread32(mmio_base + PDC_SYS_CTL); /* flush */
/* calculate the input clock in Hz */
- usec_elapsed = (end_time.tv_sec - start_time.tv_sec) * 1000000 +
- (end_time.tv_usec - start_time.tv_usec);
+ usec_elapsed = (long) ktime_us_delta(end_time, start_time);
pll_clock = ((start_count - end_count) & 0x3fffffff) / 100 *
(100000000 / usec_elapsed);