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| author | Dave Airlie <airlied@redhat.com> | 2012-06-08 09:42:35 +0100 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2012-06-08 09:42:35 +0100 |
| commit | 6cf98d6ebb37a183d92c4183dc228cdeef9a7083 (patch) | |
| tree | a37584328f0e1df87db9b1c8662655a2e8891a43 /drivers/char/agp | |
| parent | 7aaa61b3476462b69f1ac7669fcca8d608ce3cb5 (diff) | |
| parent | 23e81d691a813839020f6e516b398d0f9369fe8b (diff) | |
| download | linux-6cf98d6ebb37a183d92c4183dc228cdeef9a7083.tar.gz linux-6cf98d6ebb37a183d92c4183dc228cdeef9a7083.tar.bz2 linux-6cf98d6ebb37a183d92c4183dc228cdeef9a7083.zip | |
Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes
* 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel:
drm/i915: pch_irq_handler -> {ibx, cpt}_irq_handler
char/agp: add another Ironlake host bridge
drm/i915: fix up ivb plane 3 pageflips
drm/i915: hold forcewake around ring hw init
drm/i915: Mark the ringbuffers as being in the GTT domain
drm/i915/crt: Do not rely upon the HPD presence pin
drm/i915: Reset last_retired_head when resetting ring
Diffstat (limited to 'drivers/char/agp')
| -rw-r--r-- | drivers/char/agp/intel-agp.c | 1 | ||||
| -rw-r--r-- | drivers/char/agp/intel-agp.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index 764f70c5e690..0a4185279417 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c @@ -898,6 +898,7 @@ static struct pci_device_id agp_intel_pci_table[] = { ID(PCI_DEVICE_ID_INTEL_B43_HB), ID(PCI_DEVICE_ID_INTEL_B43_1_HB), ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB), + ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB), ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB), ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB), ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB), diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h index c0091753a0d1..8e2d9140f300 100644 --- a/drivers/char/agp/intel-agp.h +++ b/drivers/char/agp/intel-agp.h @@ -212,6 +212,7 @@ #define PCI_DEVICE_ID_INTEL_G41_HB 0x2E30 #define PCI_DEVICE_ID_INTEL_G41_IG 0x2E32 #define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB 0x0040 +#define PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB 0x0069 #define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG 0x0042 #define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB 0x0044 #define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB 0x0062 |