Merge branch 'master'

1 files changed, 36 insertions, 39 deletions

diff --git a/drivers/char/drm/i810_drm.h b/drivers/char/drm/i810_drm.h
index 73ac40563b1d..2deb925a94f3 100644
--- a/drivers/char/drm/i810_drm.h
+++ b/drivers/char/drm/i810_drm.h
@@ -19,21 +19,20 @@
 #define I810_LOG_MIN_TEX_REGION_SIZE 16
 #endif
 
-#define I810_UPLOAD_TEX0IMAGE  0x1 /* handled clientside */
-#define I810_UPLOAD_TEX1IMAGE  0x2 /* handled clientside */
+#define I810_UPLOAD_TEX0IMAGE  0x1	/* handled clientside */
+#define I810_UPLOAD_TEX1IMAGE  0x2	/* handled clientside */
 #define I810_UPLOAD_CTX        0x4
 #define I810_UPLOAD_BUFFERS    0x8
 #define I810_UPLOAD_TEX0       0x10
 #define I810_UPLOAD_TEX1       0x20
 #define I810_UPLOAD_CLIPRECTS  0x40
 
-
 /* Indices into buf.Setup where various bits of state are mirrored per
  * context and per buffer.  These can be fired at the card as a unit,
  * or in a piecewise fashion as required.
  */
 
-/* Destbuffer state 
+/* Destbuffer state
  *    - backbuffer linear offset and pitch -- invarient in the current dri
  *    - zbuffer linear offset and pitch -- also invarient
  *    - drawing origin in back and depth buffers.
@@ -55,13 +54,13 @@
 /* Context state
  */
 #define I810_CTXREG_CF0   0	/* GFX_OP_COLOR_FACTOR */
-#define I810_CTXREG_CF1   1	
-#define I810_CTXREG_ST0   2     /* GFX_OP_STIPPLE */
+#define I810_CTXREG_CF1   1
+#define I810_CTXREG_ST0   2	/* GFX_OP_STIPPLE */
 #define I810_CTXREG_ST1   3
 #define I810_CTXREG_VF    4	/* GFX_OP_VERTEX_FMT */
 #define I810_CTXREG_MT    5	/* GFX_OP_MAP_TEXELS */
 #define I810_CTXREG_MC0   6	/* GFX_OP_MAP_COLOR_STAGES - stage 0 */
-#define I810_CTXREG_MC1   7     /* GFX_OP_MAP_COLOR_STAGES - stage 1 */
+#define I810_CTXREG_MC1   7	/* GFX_OP_MAP_COLOR_STAGES - stage 1 */
 #define I810_CTXREG_MC2   8	/* GFX_OP_MAP_COLOR_STAGES - stage 2 */
 #define I810_CTXREG_MA0   9	/* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
 #define I810_CTXREG_MA1   10	/* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
@@ -74,14 +73,14 @@
 #define I810_CTXREG_PV    17	/* GFX_OP_PV_RULE -- Invarient! */
 #define I810_CTXREG_ZA    18	/* GFX_OP_ZBIAS_ALPHAFUNC */
 #define I810_CTXREG_AA    19	/* GFX_OP_ANTIALIAS */
-#define I810_CTX_SETUP_SIZE 20 
+#define I810_CTX_SETUP_SIZE 20
 
 /* Texture state (per tex unit)
  */
 #define I810_TEXREG_MI0  0	/* GFX_OP_MAP_INFO (4 dwords) */
-#define I810_TEXREG_MI1  1	
-#define I810_TEXREG_MI2  2	
-#define I810_TEXREG_MI3  3	
+#define I810_TEXREG_MI1  1
+#define I810_TEXREG_MI2  2
+#define I810_TEXREG_MI3  3
 #define I810_TEXREG_MF   4	/* GFX_OP_MAP_FILTER */
 #define I810_TEXREG_MLC  5	/* GFX_OP_MAP_LOD_CTL */
 #define I810_TEXREG_MLL  6	/* GFX_OP_MAP_LOD_LIMITS */
@@ -98,7 +97,7 @@ typedef enum _drm_i810_init_func {
 	I810_INIT_DMA = 0x01,
 	I810_CLEANUP_DMA = 0x02,
 	I810_INIT_DMA_1_4 = 0x03
- } drm_i810_init_func_t;
+} drm_i810_init_func_t;
 
 /* This is the init structure after v1.2 */
 typedef struct _drm_i810_init {
@@ -122,7 +121,7 @@ typedef struct _drm_i810_init {
 	unsigned int w;
 	unsigned int h;
 	unsigned int pitch;
-	unsigned int pitch_bits; 
+	unsigned int pitch_bits;
 } drm_i810_init_t;
 
 /* This is the init structure prior to v1.2 */
@@ -140,23 +139,23 @@ typedef struct _drm_i810_pre12_init {
 	unsigned int w;
 	unsigned int h;
 	unsigned int pitch;
-	unsigned int pitch_bits; 
+	unsigned int pitch_bits;
 } drm_i810_pre12_init_t;
 
 /* Warning: If you change the SAREA structure you must change the Xserver
  * structure as well */
 
 typedef struct _drm_i810_tex_region {
-	unsigned char next, prev; /* indices to form a circular LRU  */
+	unsigned char next, prev;	/* indices to form a circular LRU  */
 	unsigned char in_use;	/* owned by a client, or free? */
 	int age;		/* tracked by clients to update local LRU's */
 } drm_i810_tex_region_t;
 
 typedef struct _drm_i810_sarea {
-   	unsigned int ContextState[I810_CTX_SETUP_SIZE];
-   	unsigned int BufferState[I810_DEST_SETUP_SIZE];
-   	unsigned int TexState[2][I810_TEX_SETUP_SIZE];
-   	unsigned int dirty;
+	unsigned int ContextState[I810_CTX_SETUP_SIZE];
+	unsigned int BufferState[I810_DEST_SETUP_SIZE];
+	unsigned int TexState[2][I810_TEX_SETUP_SIZE];
+	unsigned int dirty;
 
 	unsigned int nbox;
 	drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS];
@@ -174,22 +173,22 @@ typedef struct _drm_i810_sarea {
 	 * texture space, and can make informed decisions as to which
 	 * areas to kick out.  There is no need to choose whether to
 	 * kick out your own texture or someone else's - simply eject
-	 * them all in LRU order.  
+	 * them all in LRU order.
 	 */
-   
-	drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS+1]; 
-				/* Last elt is sentinal */
-        int texAge;		/* last time texture was uploaded */
-        int last_enqueue;	/* last time a buffer was enqueued */
+
+	drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1];
+	/* Last elt is sentinal */
+	int texAge;		/* last time texture was uploaded */
+	int last_enqueue;	/* last time a buffer was enqueued */
 	int last_dispatch;	/* age of the most recently dispatched buffer */
-	int last_quiescent;     /*  */
+	int last_quiescent;	/*  */
 	int ctxOwner;		/* last context to upload state */
 
 	int vertex_prim;
 
-	int pf_enabled;               /* is pageflipping allowed? */
+	int pf_enabled;		/* is pageflipping allowed? */
 	int pf_active;
-	int pf_current_page;	    /* which buffer is being displayed? */
+	int pf_current_page;	/* which buffer is being displayed? */
 } drm_i810_sarea_t;
 
 /* WARNING: If you change any of these defines, make sure to change the
@@ -243,13 +242,13 @@ typedef struct _drm_i810_clear {
  * new set of cliprects.
  */
 typedef struct _drm_i810_vertex {
-   	int idx;		/* buffer index */
+	int idx;		/* buffer index */
 	int used;		/* nr bytes in use */
 	int discard;		/* client is finished with the buffer? */
 } drm_i810_vertex_t;
 
 typedef struct _drm_i810_copy_t {
-   	int idx;		/* buffer index */
+	int idx;		/* buffer index */
 	int used;		/* nr bytes in use */
 	void *address;		/* Address to copy from */
 } drm_i810_copy_t;
@@ -264,7 +263,6 @@ typedef struct _drm_i810_copy_t {
 #define PR_RECTS             (0x7<<18)
 #define PR_MASK              (0x7<<18)
 
-
 typedef struct drm_i810_dma {
 	void *virtual;
 	int request_idx;
@@ -273,17 +271,16 @@ typedef struct drm_i810_dma {
 } drm_i810_dma_t;
 
 typedef struct _drm_i810_overlay_t {
-	unsigned int offset;    /* Address of the Overlay Regs */
+	unsigned int offset;	/* Address of the Overlay Regs */
 	unsigned int physical;
 } drm_i810_overlay_t;
 
 typedef struct _drm_i810_mc {
-	int idx;                /* buffer index */
-	int used;               /* nr bytes in use */
-	int num_blocks;         /* number of GFXBlocks */
-	int *length;            /* List of lengths for GFXBlocks (FUTURE)*/
-	unsigned int last_render; /* Last Render Request */
+	int idx;		/* buffer index */
+	int used;		/* nr bytes in use */
+	int num_blocks;		/* number of GFXBlocks */
+	int *length;		/* List of lengths for GFXBlocks (FUTURE) */
+	unsigned int last_render;	/* Last Render Request */
 } drm_i810_mc_t;
 
-
-#endif /* _I810_DRM_H_ */
+#endif				/* _I810_DRM_H_ */