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author | Arnd Bergmann <arnd@arndb.de> | 2016-09-06 15:01:10 +0200 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-09-14 11:17:15 -0700 |
commit | 0d5aa65e329e7f0b753686e116c99e2d7263bced (patch) | |
tree | 1b35649b1ada90ea9632f2f8a60c86082cbffa71 /drivers/clk/meson/meson8b.c | |
parent | 344dcc02b0578bb3f2523aaa54d7f33730c7f5af (diff) | |
download | linux-0d5aa65e329e7f0b753686e116c99e2d7263bced.tar.gz linux-0d5aa65e329e7f0b753686e116c99e2d7263bced.tar.bz2 linux-0d5aa65e329e7f0b753686e116c99e2d7263bced.zip |
clk: meson: fix CLKID_GCLK_VENCI_INT typo
The addition of many gate clocks added two entries in an array for
the same value:
drivers/clk/meson/meson8b.c:479:10: error: initialized field overwritten [-Werror=override-init]
[CLKID_GCLK_VENCI_INT] = &meson8b_gclk_venci_int.hw,
[CLKID_GCLK_VENCI_INT] = &meson8b_gclk_vencp_int.hw,
This was clearly an accident, and since all other identifiers are
listed in the order in which they are defined, I'm changing the
first one to CLKID_GCLK_VENCI_INT0, making it all consistent again.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: e31a1900c1ff ("meson: clk: Add support for clock gates")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/meson/meson8b.c')
-rw-r--r-- | drivers/clk/meson/meson8b.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index aaa3e393d6b6..3f1be46cbb33 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -476,7 +476,7 @@ static struct clk_hw_onecell_data meson8b_hw_onecell_data = { [CLKID_VCLK2_VENCP0] = &meson8b_vclk2_vencp0.hw, [CLKID_VCLK2_VENCP1] = &meson8b_vclk2_vencp1.hw, [CLKID_GCLK_VENCI_INT] = &meson8b_gclk_venci_int.hw, - [CLKID_GCLK_VENCI_INT] = &meson8b_gclk_vencp_int.hw, + [CLKID_GCLK_VENCP_INT] = &meson8b_gclk_vencp_int.hw, [CLKID_DAC_CLK] = &meson8b_dac_clk.hw, [CLKID_AOCLK_GATE] = &meson8b_aoclk_gate.hw, [CLKID_IEC958_GATE] = &meson8b_iec958_gate.hw, |