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author | Michael Turquette <mturquette@linaro.org> | 2014-12-11 12:17:15 -0800 |
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committer | Michael Turquette <mturquette@linaro.org> | 2014-12-11 12:17:15 -0800 |
commit | c9b928148eb430bc2beb486d94efd2c3bc439a0c (patch) | |
tree | 9bae414dc6a2e926eef9cec8d7df0480db96271e /drivers/clk/samsung/clk-exynos4415.c | |
parent | 74fc23aa40525695e47d6988f9c0a501e39ef01d (diff) | |
parent | c31844ffdbd4e73a16c66e9d7df8ec290ab4b159 (diff) | |
download | linux-c9b928148eb430bc2beb486d94efd2c3bc439a0c.tar.gz linux-c9b928148eb430bc2beb486d94efd2c3bc439a0c.tar.bz2 linux-c9b928148eb430bc2beb486d94efd2c3bc439a0c.zip |
Merge tag 'for-v3.19-exynos-clk-2' of git://linuxtv.org/snawrocki/samsung into clk-next
- exynos4415 and exynos audio subsystem clk driver (build
with PM_SLEEP disabled, resource release) fixes
- minor cleanups in drivers/clk/samsung/clk.c (spelling,
includes)
- modification of the exynos4 HDMI PHY clock definition to
model dependency of "sclk_hdmiphy" on the "hdmi" clock
Diffstat (limited to 'drivers/clk/samsung/clk-exynos4415.c')
-rw-r--r-- | drivers/clk/samsung/clk-exynos4415.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/clk/samsung/clk-exynos4415.c b/drivers/clk/samsung/clk-exynos4415.c index c7208c7a3add..2123fc251e0f 100644 --- a/drivers/clk/samsung/clk-exynos4415.c +++ b/drivers/clk/samsung/clk-exynos4415.c @@ -118,12 +118,13 @@ enum exynos4415_plls { nr_plls, }; +static struct samsung_clk_provider *exynos4415_ctx; + /* * Support for CMU save/restore across system suspends */ #ifdef CONFIG_PM_SLEEP static struct samsung_clk_reg_dump *exynos4415_clk_regs; -static struct samsung_clk_provider *exynos4415_ctx; static unsigned long exynos4415_cmu_clk_regs[] __initdata = { SRC_LEFTBUS, @@ -1031,9 +1032,10 @@ enum exynos4415_dmc_plls { nr_dmc_plls, }; +static struct samsung_clk_provider *exynos4415_dmc_ctx; + #ifdef CONFIG_PM_SLEEP static struct samsung_clk_reg_dump *exynos4415_dmc_clk_regs; -static struct samsung_clk_provider *exynos4415_dmc_ctx; static unsigned long exynos4415_cmu_dmc_clk_regs[] __initdata = { MPLL_LOCK, |