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| author | Javier Martinez Canillas <javier@osg.samsung.com> | 2016-05-24 13:41:01 -0400 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2016-06-02 11:18:17 +0200 |
| commit | 34cba900375ec1751a87d3655ad03b9a5b022362 (patch) | |
| tree | d6c04fdc3fa9e8b14e81104a745f2a9d8e74aea2 /drivers/clk/samsung | |
| parent | 41743a19b6ea786bc528c77868b353ab65ed5f3f (diff) | |
| download | linux-34cba900375ec1751a87d3655ad03b9a5b022362.tar.gz linux-34cba900375ec1751a87d3655ad03b9a5b022362.tar.bz2 linux-34cba900375ec1751a87d3655ad03b9a5b022362.zip | |
clk: samsung: exynos5420: Set ID for aclk333 gate clock
The aclk333 clock needs to be ungated during the MFC power domain switch,
so set the clock ID to allow the Exynos power domain logic to lookup this
clock if is defined in the MFC PD device tree node.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'drivers/clk/samsung')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5420.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 95872b7c47c9..bb196ca21a77 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -946,7 +946,7 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = { GATE_BUS_TOP, 13, 0, 0), GATE(0, "aclk166", "mout_user_aclk166", GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0), - GATE(0, "aclk333", "mout_user_aclk333", + GATE(CLK_ACLK333, "aclk333", "mout_user_aclk333", GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0), GATE(0, "aclk400_isp", "mout_user_aclk400_isp", GATE_BUS_TOP, 16, 0, 0), |