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author | Samuel Holland <samuel@sholland.org> | 2022-02-02 20:17:35 -0600 |
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committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2022-03-23 19:58:38 +0100 |
commit | d91612d7f01aca454469976d25db761c5085ae4d (patch) | |
tree | 7eba8348e3214a8a9423b52fb13de6e9fd7a5a2e /drivers/clk/starfive/clk-starfive-jh7100.c | |
parent | 7fc46339c33e60218bbb1f542d55da1678919d11 (diff) | |
download | linux-d91612d7f01aca454469976d25db761c5085ae4d.tar.gz linux-d91612d7f01aca454469976d25db761c5085ae4d.tar.bz2 linux-d91612d7f01aca454469976d25db761c5085ae4d.zip |
clk: sunxi-ng: Add support for the sun6i RTC clocks
The RTC power domain in sun6i and newer SoCs manages the 16 MHz RC
oscillator (called "IOSC" or "osc16M") and the optional 32 kHz crystal
oscillator (called "LOSC" or "osc32k"). Starting with the H6, this power
domain also handles the 24 MHz DCXO (called variously "HOSC", "dcxo24M",
or "osc24M") as well. The H6 also adds a calibration circuit for IOSC.
Later SoCs introduce further variations on the design:
- H616 adds an additional mux for the 32 kHz fanout source.
- R329 adds an additional mux for the RTC timekeeping clock, a clock
for the SPI bus between power domains inside the RTC, and removes the
IOSC calibration functionality.
Take advantage of the CCU framework to handle this increased complexity.
This driver is intended to be a drop-in replacement for the existing RTC
clock provider. So some runtime adjustment of the clock parents is
needed, both to handle hardware differences, and to support the old
binding which omitted some of the input clocks.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20220203021736.13434-6-samuel@sholland.org
Diffstat (limited to 'drivers/clk/starfive/clk-starfive-jh7100.c')
0 files changed, 0 insertions, 0 deletions