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authorPeter De Schrijver <pdeschrijver@nvidia.com>2013-09-04 17:04:19 +0300
committerPeter De Schrijver <pdeschrijver@nvidia.com>2013-11-26 18:46:47 +0200
commit76ebc134d45d7e6e1dc29fdcef4e539c5bc76eb8 (patch)
treead44079c32a84567ba3d05bed0d9252a06736efe /drivers/clk/tegra/clk-tegra20.c
parent6609dbe40e199ca8b1e99513d0e4bbc32b0d53b7 (diff)
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clk: tegra: move periph clocks to common file
Introduce a new file for peripheral clocks common between several Tegra SoCs and move Tegra114 to this new infrastructure. Also PLLP and the PLLP_OUT clocks will be initialized here. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra20.c')
-rw-r--r--drivers/clk/tegra/clk-tegra20.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
index 31547fde92e4..7c9af8e2c33b 100644
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
@@ -973,7 +973,7 @@ static void __init tegra20_periph_clk_init(void)
for (i = 0; i < ARRAY_SIZE(tegra_periph_clk_list); i++) {
data = &tegra_periph_clk_list[i];
- clk = tegra_clk_register_periph(data->name, data->parent_names,
+ clk = tegra_clk_register_periph(data->name, data->p.parent_names,
data->num_parents, &data->periph,
clk_base, data->offset, data->flags);
clk_register_clkdev(clk, data->con_id, data->dev_id);
@@ -983,7 +983,7 @@ static void __init tegra20_periph_clk_init(void)
for (i = 0; i < ARRAY_SIZE(tegra_periph_nodiv_clk_list); i++) {
data = &tegra_periph_nodiv_clk_list[i];
clk = tegra_clk_register_periph_nodiv(data->name,
- data->parent_names,
+ data->p.parent_names,
data->num_parents, &data->periph,
clk_base, data->offset);
clk_register_clkdev(clk, data->con_id, data->dev_id);